camel-cdr wrote:

Reading 
https://www.spacemit.com/en/news/spacemit-makes-important-breakthroughs-in-risc-v-high-performance-cores/,
 it sounds like the X100 should enable some of the fusion tuning flags.

I'm not sure how `TuneDLenFactor2` is used by llvm, but it sounds like X100 is 
VLEN=256 and four issue DLEN=128. While the SiFive cores that currently define 
`TuneDLenFactor2` are single issue DLEN=VLEN/2.

https://github.com/llvm/llvm-project/pull/173988
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