================ @@ -0,0 +1,1108 @@ +//===--- BuiltinsAMDGPU.td - AMDGPU Builtin function defs -------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the AMDGPU-specific builtin function database. +// +//===----------------------------------------------------------------------===// + +include "clang/Basic/BuiltinsBase.td" + +//===----------------------------------------------------------------------===// +// AMDGPU builtin base classes +//===----------------------------------------------------------------------===// + +class OtherBuiltin<string prototype, list<Attribute> Attr = []> : TargetBuiltin { + let Spellings = ["__builtin_"#NAME]; + let Prototype = prototype; + let Attributes = !listconcat([NoThrow], Attr); +} + +class AMDGPUBuiltin<string prototype, list<Attribute> Attr = []> : TargetBuiltin { + let Spellings = ["__builtin_amdgcn_"#NAME]; + let Prototype = prototype; + let Attributes = !listconcat([NoThrow], Attr); +} + +//===----------------------------------------------------------------------===// +// SI+ only builtins. +//===----------------------------------------------------------------------===// + +def dispatch_ptr : AMDGPUBuiltin<"void address_space<4>*()", [Const]>; +def kernarg_segment_ptr : AMDGPUBuiltin<"void address_space<4>*()", [Const]>; +def implicitarg_ptr : AMDGPUBuiltin<"void address_space<4>*()", [Const]>; +def queue_ptr : AMDGPUBuiltin<"void address_space<4>*()", [Const]>; + +let Features = "gfx1250-insts" in { + def cluster_id_x : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_id_y : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_id_z : AMDGPUBuiltin<"unsigned int()", [Const]>; + + def cluster_workgroup_id_x : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_workgroup_id_y : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_workgroup_id_z : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_workgroup_flat_id : AMDGPUBuiltin<"unsigned int()", [Const]>; + + def cluster_workgroup_max_id_x : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_workgroup_max_id_y : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_workgroup_max_id_z : AMDGPUBuiltin<"unsigned int()", [Const]>; + def cluster_workgroup_max_flat_id : AMDGPUBuiltin<"unsigned int()", [Const]>; +} + +def workgroup_id_x : AMDGPUBuiltin<"unsigned int()", [Const]>; +def workgroup_id_y : AMDGPUBuiltin<"unsigned int()", [Const]>; +def workgroup_id_z : AMDGPUBuiltin<"unsigned int()", [Const]>; + +def workitem_id_x : AMDGPUBuiltin<"unsigned int()", [Const]>; +def workitem_id_y : AMDGPUBuiltin<"unsigned int()", [Const]>; +def workitem_id_z : AMDGPUBuiltin<"unsigned int()", [Const]>; + +def workgroup_size_x : AMDGPUBuiltin<"unsigned short()", [Const]>; +def workgroup_size_y : AMDGPUBuiltin<"unsigned short()", [Const]>; +def workgroup_size_z : AMDGPUBuiltin<"unsigned short()", [Const]>; + +def grid_size_x : AMDGPUBuiltin<"unsigned int()", [Const]>; +def grid_size_y : AMDGPUBuiltin<"unsigned int()", [Const]>; +def grid_size_z : AMDGPUBuiltin<"unsigned int()", [Const]>; + +def mbcnt_hi : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int)", [Const]>; +def mbcnt_lo : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int)", [Const]>; + +let Features = "s-memtime-inst" in { def s_memtime : AMDGPUBuiltin<"uint64_t()">; } + +//===----------------------------------------------------------------------===// +// Instruction builtins. +//===----------------------------------------------------------------------===// +def s_getreg : AMDGPUBuiltin<"unsigned int(_Constant int)">; +def s_setreg : AMDGPUBuiltin<"void(_Constant int, unsigned int)">; +def s_getpc : AMDGPUBuiltin<"uint64_t()">; +def s_waitcnt : AMDGPUBuiltin<"void(_Constant int)">; +def s_sendmsg : AMDGPUBuiltin<"void(_Constant int, unsigned int)">; +def s_sendmsghalt : AMDGPUBuiltin<"void(_Constant int, unsigned int)">; +def s_barrier : AMDGPUBuiltin<"void()">; +def s_ttracedata : AMDGPUBuiltin<"void(int)">; +def wave_barrier : AMDGPUBuiltin<"void()">; +def sched_barrier : AMDGPUBuiltin<"void(_Constant int)">; +def sched_group_barrier : AMDGPUBuiltin<"void(_Constant int, _Constant int, _Constant int)">; +def iglp_opt : AMDGPUBuiltin<"void(_Constant int)">; +def s_dcache_inv : AMDGPUBuiltin<"void()">; +def buffer_wbinvl1 : AMDGPUBuiltin<"void()">; +def fence : AMDGPUBuiltin<"void(unsigned int, char const *, ...)">; +def groupstaticsize : AMDGPUBuiltin<"unsigned int()">; +def wavefrontsize : AMDGPUBuiltin<"unsigned int()", [Const]>; + +def atomic_inc32 : AMDGPUBuiltin<"uint32_t(uint32_t volatile *, uint32_t, unsigned int, char const *)">; +def atomic_inc64 : AMDGPUBuiltin<"uint64_t(uint64_t volatile *, uint64_t, unsigned int, char const *)">; + +def atomic_dec32 : AMDGPUBuiltin<"uint32_t(uint32_t volatile *, uint32_t, unsigned int, char const *)">; +def atomic_dec64 : AMDGPUBuiltin<"uint64_t(uint64_t volatile *, uint64_t, unsigned int, char const *)">; + +// FIXME: Need to disallow constant address space. +def div_scale : AMDGPUBuiltin<"double(double, double, bool, bool *)">; +def div_scalef : AMDGPUBuiltin<"float(float, float, bool, bool *)">; +def div_fmas : AMDGPUBuiltin<"double(double, double, double, bool)", [Const]>; +def div_fmasf : AMDGPUBuiltin<"float(float, float, float, bool)", [Const]>; +def div_fixup : AMDGPUBuiltin<"double(double, double, double)", [Const]>; +def div_fixupf : AMDGPUBuiltin<"float(float, float, float)", [Const]>; +def trig_preop : AMDGPUBuiltin<"double(double, int)", [Const]>; +def trig_preopf : AMDGPUBuiltin<"float(float, int)", [Const]>; +def rcp : AMDGPUBuiltin<"double(double)", [Const]>; +def rcpf : AMDGPUBuiltin<"float(float)", [Const]>; +def sqrt : AMDGPUBuiltin<"double(double)", [Const]>; +def sqrtf : AMDGPUBuiltin<"float(float)", [Const]>; +def rsq : AMDGPUBuiltin<"double(double)", [Const]>; +def rsqf : AMDGPUBuiltin<"float(float)", [Const]>; +def rsq_clamp : AMDGPUBuiltin<"double(double)", [Const]>; +def rsq_clampf : AMDGPUBuiltin<"float(float)", [Const]>; +def sinf : AMDGPUBuiltin<"float(float)", [Const]>; +def cosf : AMDGPUBuiltin<"float(float)", [Const]>; +def logf : AMDGPUBuiltin<"float(float)", [Const]>; +def exp2f : AMDGPUBuiltin<"float(float)", [Const]>; +def log_clampf : AMDGPUBuiltin<"float(float)", [Const]>; +def ldexp : AMDGPUBuiltin<"double(double, int)", [Const]>; +def ldexpf : AMDGPUBuiltin<"float(float, int)", [Const]>; +def frexp_mant : AMDGPUBuiltin<"double(double)", [Const]>; +def frexp_mantf : AMDGPUBuiltin<"float(float)", [Const]>; +def frexp_exp : AMDGPUBuiltin<"int(double)", [Const]>; +def frexp_expf : AMDGPUBuiltin<"int(float)", [Const]>; +def fract : AMDGPUBuiltin<"double(double)", [Const]>; +def fractf : AMDGPUBuiltin<"float(float)", [Const]>; +def amdgcn_class : OtherBuiltin<"bool(double, int)", [Const]>; +def classf : AMDGPUBuiltin<"bool(float, int)", [Const]>; +def s_sleep : AMDGPUBuiltin<"void(_Constant int)">; +def s_incperflevel : AMDGPUBuiltin<"void(_Constant int)">; +def s_decperflevel : AMDGPUBuiltin<"void(_Constant int)">; +def s_setprio : AMDGPUBuiltin<"void(_Constant short)">; +def ds_swizzle : AMDGPUBuiltin<"int(int, _Constant int)", [Const]>; +def ds_permute : AMDGPUBuiltin<"int(int, int)", [Const]>; +def ds_bpermute : AMDGPUBuiltin<"int(int, int)", [Const]>; +def readfirstlane : AMDGPUBuiltin<"int(int)", [Const]>; +def readlane : AMDGPUBuiltin<"int(int, int)", [Const]>; +def fmed3f : AMDGPUBuiltin<"float(float, float, float)", [Const]>; +def ds_faddf : AMDGPUBuiltin<"float(float address_space<3>*, float, _Constant int, _Constant int, _Constant bool)">; +def ds_fminf : AMDGPUBuiltin<"float(float address_space<3>*, float, _Constant int, _Constant int, _Constant bool)">; +def ds_fmaxf : AMDGPUBuiltin<"float(float address_space<3>*, float, _Constant int, _Constant int, _Constant bool)">; +def ds_append : AMDGPUBuiltin<"int(int address_space<3>*)">; +def ds_consume : AMDGPUBuiltin<"int(int address_space<3>*)">; +def alignbit : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; +def alignbyte : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; +def ubfe : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; +def sbfe : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; +def cvt_pkrtz : AMDGPUBuiltin<"_ExtVector<2, __fp16>(float, float)", [Const]>; +def cvt_pk_i16 : AMDGPUBuiltin<"_ExtVector<2, short>(int, int)", [Const]>; +def cvt_pk_u16 : AMDGPUBuiltin<"_ExtVector<2, unsigned short>(unsigned int, unsigned int)", [Const]>; +def cvt_pk_u8_f32 : AMDGPUBuiltin<"unsigned int(float, unsigned int, unsigned int)", [Const]>; +def cvt_off_f32_i4 : AMDGPUBuiltin<"float(int)", [Const]>; +def msad_u8 : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; +def mqsad_pk_u16_u8 : AMDGPUBuiltin<"uint64_t(uint64_t, unsigned int, uint64_t)", [Const]>; +def mqsad_u32_u8 : AMDGPUBuiltin<"_Vector<4, unsigned int>(uint64_t, unsigned int, _Vector<4, unsigned int>)", [Const]>; + +let Features = "lerp-inst" in { def lerp : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; } +let Features = "cube-insts" in { def cubeid : AMDGPUBuiltin<"float(float, float, float)", [Const]>; } +let Features = "cube-insts" in { def cubesc : AMDGPUBuiltin<"float(float, float, float)", [Const]>; } +let Features = "cube-insts" in { def cubetc : AMDGPUBuiltin<"float(float, float, float)", [Const]>; } +let Features = "cube-insts" in { def cubema : AMDGPUBuiltin<"float(float, float, float)", [Const]>; } +let Features = "cvt-pknorm-vop2-insts" in { def cvt_pknorm_i16 : AMDGPUBuiltin<"_ExtVector<2, short>(float, float)", [Const]>; } +let Features = "cvt-pknorm-vop2-insts" in { def cvt_pknorm_u16 : AMDGPUBuiltin<"_ExtVector<2, unsigned short>(float, float)", [Const]>; } +let Features = "sad-insts" in { def sad_u8 : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; } +let Features = "sad-insts" in { def sad_hi_u8 : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; } +let Features = "sad-insts" in { def sad_u16 : AMDGPUBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", [Const]>; } +let Features = "qsad-insts" in { def qsad_pk_u16_u8 : AMDGPUBuiltin<"uint64_t(uint64_t, unsigned int, uint64_t)", [Const]>; } + +def make_buffer_rsrc : AMDGPUBuiltin<"__amdgpu_buffer_rsrc_t(void *, short, int64_t, int)", [Const]>; +def raw_buffer_store_b8 : AMDGPUBuiltin<"void(unsigned char, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_store_b16 : AMDGPUBuiltin<"void(unsigned short, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_store_b32 : AMDGPUBuiltin<"void(unsigned int, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_store_b64 : AMDGPUBuiltin<"void(_Vector<2, unsigned int>, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_store_b96 : AMDGPUBuiltin<"void(_Vector<3, unsigned int>, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_store_b128 : AMDGPUBuiltin<"void(_Vector<4, unsigned int>, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_load_b8 : AMDGPUBuiltin<"unsigned char(__amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_load_b16 : AMDGPUBuiltin<"unsigned short(__amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_load_b32 : AMDGPUBuiltin<"unsigned int(__amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_load_b64 : AMDGPUBuiltin<"_Vector<2, unsigned int>(__amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_load_b96 : AMDGPUBuiltin<"_Vector<3, unsigned int>(__amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +def raw_buffer_load_b128 : AMDGPUBuiltin<"_Vector<4, unsigned int>(__amdgpu_buffer_rsrc_t, int, int, _Constant int)">; + +def raw_ptr_buffer_atomic_add_i32 : AMDGPUBuiltin<"int(int, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; + +let Features = "atomic-fadd-rtn-insts" in { def raw_ptr_buffer_atomic_fadd_f32 : AMDGPUBuiltin<"float(float, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; } +let Features = "atomic-buffer-global-pk-add-f16-insts" in { def raw_ptr_buffer_atomic_fadd_v2f16 : AMDGPUBuiltin<"_Vector<2, _Float16>(_Vector<2, _Float16>, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; } + +let Features = "atomic-fmin-fmax-global-f32" in { + def raw_ptr_buffer_atomic_fmin_f32 : AMDGPUBuiltin<"float(float, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; + def raw_ptr_buffer_atomic_fmax_f32 : AMDGPUBuiltin<"float(float, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +} + +let Features = "atomic-fmin-fmax-global-f64" in { + def raw_ptr_buffer_atomic_fmin_f64 : AMDGPUBuiltin<"double(double, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; + def raw_ptr_buffer_atomic_fmax_f64 : AMDGPUBuiltin<"double(double, __amdgpu_buffer_rsrc_t, int, int, _Constant int)">; +} + +let Features = "vmem-to-lds-load-insts" in { + def raw_ptr_buffer_load_lds : AMDGPUBuiltin<"void(__amdgpu_buffer_rsrc_t, void address_space<3>*, _Constant unsigned int, int, int, _Constant int, _Constant int)">; + def struct_ptr_buffer_load_lds : AMDGPUBuiltin<"void(__amdgpu_buffer_rsrc_t, void address_space<3>*, _Constant unsigned int, int, int, int, _Constant int, _Constant int)">; +} + +//===----------------------------------------------------------------------===// +// Ballot builtins. +//===----------------------------------------------------------------------===// + +let Features = "wavefrontsize32" in { def ballot_w32 : AMDGPUBuiltin<"uint32_t(bool)", [Const]>; } +def ballot_w64 : AMDGPUBuiltin<"uint64_t(bool)", [Const]>; + +let Features = "wavefrontsize32" in { def inverse_ballot_w32 : AMDGPUBuiltin<"bool(uint32_t)", [Const]>; } +let Features = "wavefrontsize64" in { def inverse_ballot_w64 : AMDGPUBuiltin<"bool(uint64_t)", [Const]>; } + +// Deprecated intrinsics in favor of __builtin_amdgn_ballot_{w32|w64} +def uicmp : AMDGPUBuiltin<"uint64_t(unsigned int, unsigned int, _Constant int)", [Const]>; +def uicmpl : AMDGPUBuiltin<"uint64_t(uint64_t, uint64_t, _Constant int)", [Const]>; +def sicmp : AMDGPUBuiltin<"uint64_t(int, int, _Constant int)", [Const]>; +def sicmpl : AMDGPUBuiltin<"uint64_t(int64_t, int64_t, _Constant int)", [Const]>; +def fcmp : AMDGPUBuiltin<"uint64_t(double, double, _Constant int)", [Const]>; +def fcmpf : AMDGPUBuiltin<"uint64_t(float, float, _Constant int)", [Const]>; + +//===----------------------------------------------------------------------===// +// Flat addressing builtins. +//===----------------------------------------------------------------------===// +def is_shared : AMDGPUBuiltin<"bool(void const address_space<0>*)", [Const]>; +def is_private : AMDGPUBuiltin<"bool(void const address_space<0>*)", [Const]>; + +//===----------------------------------------------------------------------===// +// GWS builtins. +//===----------------------------------------------------------------------===// +let Features = "gws" in { + def ds_gws_init : AMDGPUBuiltin<"void(unsigned int, unsigned int)">; + def ds_gws_barrier : AMDGPUBuiltin<"void(unsigned int, unsigned int)">; + def ds_gws_sema_v : AMDGPUBuiltin<"void(unsigned int)">; + def ds_gws_sema_br : AMDGPUBuiltin<"void(unsigned int, unsigned int)">; + def ds_gws_sema_p : AMDGPUBuiltin<"void(unsigned int)">; +} + +//===----------------------------------------------------------------------===// +// CI+ only builtins. +//===----------------------------------------------------------------------===// +let Features = "ci-insts" in { + def s_dcache_inv_vol : AMDGPUBuiltin<"void()">; + def buffer_wbinvl1_vol : AMDGPUBuiltin<"void()">; + def ds_gws_sema_release_all : AMDGPUBuiltin<"void(unsigned int)">; +} + +//===----------------------------------------------------------------------===// +// Interpolation builtins. +//===----------------------------------------------------------------------===// +def interp_p1_f16 : AMDGPUBuiltin<"float(float, unsigned int, unsigned int, bool, unsigned int)", [Const]>; +def interp_p2_f16 : AMDGPUBuiltin<"__fp16(float, float, unsigned int, unsigned int, bool, unsigned int)", [Const]>; +def interp_p1 : AMDGPUBuiltin<"float(float, unsigned int, unsigned int, unsigned int)", [Const]>; +def interp_p2 : AMDGPUBuiltin<"float(float, float, unsigned int, unsigned int, unsigned int)", [Const]>; +def interp_mov : AMDGPUBuiltin<"float(unsigned int, unsigned int, unsigned int, unsigned int)", [Const]>; + +//===----------------------------------------------------------------------===// +// VI+ only builtins. +//===----------------------------------------------------------------------===// + +let Features = "16-bit-insts" in { ---------------- shiltian wrote:
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