llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: Farzon Lotfi (farzonl) <details> <summary>Changes</summary> fixes https://github.com/llvm/llvm-project/issues/179859 For matrix types we need to check the language mode so we can change the matrix memory layout to arrays of vectors. To make this play nice with how the rest of clang treats matrices we need to modify the MaybeConvertMatrixAddress and the CreateMemTemp function to know how to reconstruct a flattened vector. Rest of changes is just test updates. --- Patch is 45.63 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/179861.diff 12 Files Affected: - (modified) clang/lib/CodeGen/CGExpr.cpp (+16-4) - (modified) clang/lib/CodeGen/CodeGenTypes.cpp (+7-2) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl (+14-14) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl (+16-16) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl (+15-15) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptConstSwizzle.hlsl (+2-2) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptDynamicSwizzle.hlsl (+3-3) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl (+10-10) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl (+1-1) - (modified) clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl (+10-10) - (modified) clang/test/CodeGenHLSL/BoolMatrix.hlsl (+10-10) - (modified) clang/test/CodeGenHLSL/basic_types.hlsl (+16-16) ``````````diff diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp index 69b616af20c88..b1106284af82f 100644 --- a/clang/lib/CodeGen/CGExpr.cpp +++ b/clang/lib/CodeGen/CGExpr.cpp @@ -201,8 +201,14 @@ RawAddress CodeGenFunction::CreateMemTemp(QualType Ty, CharUnits Align, if (Ty->isConstantMatrixType()) { auto *ArrayTy = cast<llvm::ArrayType>(Result.getElementType()); - auto *VectorTy = llvm::FixedVectorType::get(ArrayTy->getElementType(), - ArrayTy->getNumElements()); + auto *ArrayElementTy = ArrayTy->getElementType(); + auto ArrayElements = ArrayTy->getNumElements(); + if (getContext().getLangOpts().HLSL) { + auto *VectorTy = cast<llvm::FixedVectorType>(ArrayElementTy); + ArrayElementTy = VectorTy->getElementType(); + ArrayElements *= VectorTy->getNumElements(); + } + auto *VectorTy = llvm::FixedVectorType::get(ArrayElementTy, ArrayElements); Result = Address(Result.getPointer(), VectorTy, Result.getAlignment(), KnownNonNull); @@ -2280,8 +2286,14 @@ static RawAddress MaybeConvertMatrixAddress(RawAddress Addr, bool IsVector = true) { auto *ArrayTy = dyn_cast<llvm::ArrayType>(Addr.getElementType()); if (ArrayTy && IsVector) { - auto *VectorTy = llvm::FixedVectorType::get(ArrayTy->getElementType(), - ArrayTy->getNumElements()); + auto ArrayElements = ArrayTy->getNumElements(); + auto *ArrayElementTy = ArrayTy->getElementType(); + if (CGF.getContext().getLangOpts().HLSL) { + auto *VectorTy = cast<llvm::FixedVectorType>(ArrayElementTy); + ArrayElementTy = VectorTy->getElementType(); + ArrayElements *= VectorTy->getNumElements(); + } + auto *VectorTy = llvm::FixedVectorType::get(ArrayElementTy, ArrayElements); return Addr.withElementType(VectorTy); } diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp b/clang/lib/CodeGen/CodeGenTypes.cpp index 0e1131d586433..fd7a8929a9be9 100644 --- a/clang/lib/CodeGen/CodeGenTypes.cpp +++ b/clang/lib/CodeGen/CodeGenTypes.cpp @@ -105,8 +105,13 @@ llvm::Type *CodeGenTypes::ConvertTypeForMem(QualType T) { const Type *Ty = Context.getCanonicalType(T).getTypePtr(); const ConstantMatrixType *MT = cast<ConstantMatrixType>(Ty); llvm::Type *IRElemTy = ConvertType(MT->getElementType()); - if (Context.getLangOpts().HLSL && T->isConstantMatrixBoolType()) - IRElemTy = ConvertTypeForMem(Context.BoolTy); + if (Context.getLangOpts().HLSL) { + if (T->isConstantMatrixBoolType()) + IRElemTy = ConvertTypeForMem(Context.BoolTy); + llvm::Type *VecTy = + llvm::FixedVectorType::get(IRElemTy, MT->getNumColumns()); + return llvm::ArrayType::get(VecTy, MT->getNumRows()); + } return llvm::ArrayType::get(IRElemTy, MT->getNumElementsFlattened()); } diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl index 3bd7636212862..f48edc19b86f7 100644 --- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl +++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl @@ -5,8 +5,8 @@ // CHECK-LABEL: define hidden noundef <6 x i32> @_Z22elementwise_type_cast0u11matrix_typeILm3ELm2EfE( // CHECK-SAME: <6 x float> noundef nofpclass(nan inf) [[F32:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[F32_ADDR:%.*]] = alloca [6 x float], align 4 -// CHECK-NEXT: [[I32:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[F32_ADDR:%.*]] = alloca [3 x <2 x float>], align 4 +// CHECK-NEXT: [[I32:%.*]] = alloca [3 x <2 x i32>], align 4 // CHECK-NEXT: store <6 x float> [[F32]], ptr [[F32_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <6 x float>, ptr [[F32_ADDR]], align 4 // CHECK-NEXT: [[CONV:%.*]] = fptosi <6 x float> [[TMP0]] to <6 x i32> @@ -22,8 +22,8 @@ int3x2 elementwise_type_cast0(float3x2 f32) { // CHECK-LABEL: define hidden noundef <6 x i32> @_Z22elementwise_type_cast1u11matrix_typeILm3ELm2EsE( // CHECK-SAME: <6 x i16> noundef [[I16_32:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I16_32_ADDR:%.*]] = alloca [6 x i16], align 2 -// CHECK-NEXT: [[I32:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[I16_32_ADDR:%.*]] = alloca [3 x <2 x i16>], align 2 +// CHECK-NEXT: [[I32:%.*]] = alloca [3 x <2 x i32>], align 4 // CHECK-NEXT: store <6 x i16> [[I16_32]], ptr [[I16_32_ADDR]], align 2 // CHECK-NEXT: [[TMP0:%.*]] = load <6 x i16>, ptr [[I16_32_ADDR]], align 2 // CHECK-NEXT: [[CONV:%.*]] = sext <6 x i16> [[TMP0]] to <6 x i32> @@ -39,8 +39,8 @@ int3x2 elementwise_type_cast1(int16_t3x2 i16_32) { // CHECK-LABEL: define hidden noundef <6 x i32> @_Z22elementwise_type_cast2u11matrix_typeILm3ELm2ElE( // CHECK-SAME: <6 x i64> noundef [[I64_32:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I64_32_ADDR:%.*]] = alloca [6 x i64], align 8 -// CHECK-NEXT: [[I32:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[I64_32_ADDR:%.*]] = alloca [3 x <2 x i64>], align 8 +// CHECK-NEXT: [[I32:%.*]] = alloca [3 x <2 x i32>], align 4 // CHECK-NEXT: store <6 x i64> [[I64_32]], ptr [[I64_32_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load <6 x i64>, ptr [[I64_32_ADDR]], align 8 // CHECK-NEXT: [[CONV:%.*]] = trunc <6 x i64> [[TMP0]] to <6 x i32> @@ -56,8 +56,8 @@ int3x2 elementwise_type_cast2(int64_t3x2 i64_32) { // CHECK-LABEL: define hidden noundef <6 x i16> @_Z22elementwise_type_cast3u11matrix_typeILm2ELm3EDhE( // CHECK-SAME: <6 x half> noundef nofpclass(nan inf) [[H23:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[H23_ADDR:%.*]] = alloca [6 x half], align 2 -// CHECK-NEXT: [[I23:%.*]] = alloca [6 x i16], align 2 +// CHECK-NEXT: [[H23_ADDR:%.*]] = alloca [2 x <3 x half>], align 2 +// CHECK-NEXT: [[I23:%.*]] = alloca [2 x <3 x i16>], align 2 // CHECK-NEXT: store <6 x half> [[H23]], ptr [[H23_ADDR]], align 2 // CHECK-NEXT: [[TMP0:%.*]] = load <6 x half>, ptr [[H23_ADDR]], align 2 // CHECK-NEXT: [[CONV:%.*]] = fptosi <6 x half> [[TMP0]] to <6 x i16> @@ -73,8 +73,8 @@ int16_t2x3 elementwise_type_cast3(half2x3 h23) { // CHECK-LABEL: define hidden noundef <6 x i32> @_Z22elementwise_type_cast4u11matrix_typeILm3ELm2EdE( // CHECK-SAME: <6 x double> noundef nofpclass(nan inf) [[D32:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[D32_ADDR:%.*]] = alloca [6 x double], align 8 -// CHECK-NEXT: [[I32:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[D32_ADDR:%.*]] = alloca [3 x <2 x double>], align 8 +// CHECK-NEXT: [[I32:%.*]] = alloca [3 x <2 x i32>], align 4 // CHECK-NEXT: store <6 x double> [[D32]], ptr [[D32_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load <6 x double>, ptr [[D32_ADDR]], align 8 // CHECK-NEXT: [[CONV:%.*]] = fptosi <6 x double> [[TMP0]] to <6 x i32> @@ -91,7 +91,7 @@ int3x2 elementwise_type_cast4(double3x2 d32) { // CHECK-SAME: ) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[A:%.*]] = alloca [2 x [1 x i32]], align 4 -// CHECK-NEXT: [[B:%.*]] = alloca [2 x i32], align 4 +// CHECK-NEXT: [[B:%.*]] = alloca [2 x <1 x i32>], align 4 // CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [2 x [1 x i32]], align 4 // CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i32>, align 4 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[A]], ptr align 4 @__const._Z5call2v.A, i32 8, i1 false) @@ -120,7 +120,7 @@ struct S { // CHECK-SAME: ) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 1 -// CHECK-NEXT: [[A:%.*]] = alloca [2 x i32], align 4 +// CHECK-NEXT: [[A:%.*]] = alloca [2 x <1 x i32>], align 4 // CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [[STRUCT_S]], align 1 // CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <2 x i32>, align 4 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[S]], ptr align 1 @__const._Z5call3v.s, i32 8, i1 false) @@ -155,7 +155,7 @@ struct Derived : BFields { // CHECK-LABEL: define hidden void @_Z5call47Derived( // CHECK-SAME: ptr noundef byval([[STRUCT_DERIVED:%.*]]) align 1 [[D:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[A:%.*]] = alloca [4 x i32], align 4 +// CHECK-NEXT: [[A:%.*]] = alloca [2 x <2 x i32>], align 4 // CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca [[STRUCT_DERIVED]], align 1 // CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <4 x i32>, align 4 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[AGG_TEMP]], ptr align 1 [[D]], i32 19, i1 false) @@ -189,7 +189,7 @@ void call4(Derived D) { // CHECK-SAME: <4 x float> noundef nofpclass(nan inf) [[V:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x float>, align 16 -// CHECK-NEXT: [[M:%.*]] = alloca [4 x float], align 4 +// CHECK-NEXT: [[M:%.*]] = alloca [2 x <2 x float>], align 4 // CHECK-NEXT: [[HLSL_EWCAST_SRC:%.*]] = alloca <4 x float>, align 16 // CHECK-NEXT: [[FLATCAST_TMP:%.*]] = alloca <4 x float>, align 4 // CHECK-NEXT: store <4 x float> [[V]], ptr [[V_ADDR]], align 16 diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl index f3c4bc496d5a4..56f816806d63f 100644 --- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl +++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl @@ -4,8 +4,8 @@ // CHECK-LABEL: define hidden noundef <12 x i32> @_Z10trunc_castu11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I34:%.*]] = alloca [12 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I34:%.*]] = alloca [3 x <4 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11> @@ -21,8 +21,8 @@ // CHECK-LABEL: define hidden noundef <12 x i32> @_Z11trunc_cast0u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I43:%.*]] = alloca [12 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I43:%.*]] = alloca [4 x <3 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 12, i32 13, i32 14> @@ -38,8 +38,8 @@ // CHECK-LABEL: define hidden noundef <9 x i32> @_Z11trunc_cast1u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I33:%.*]] = alloca [9 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I33:%.*]] = alloca [3 x <3 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10> @@ -55,8 +55,8 @@ // CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast2u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I32:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I32:%.*]] = alloca [3 x <2 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9> @@ -72,8 +72,8 @@ // CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast3u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I23:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I23:%.*]] = alloca [2 x <3 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6> @@ -89,8 +89,8 @@ // CHECK-LABEL: define hidden noundef <4 x i32> @_Z11trunc_cast4u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I22:%.*]] = alloca [4 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I22:%.*]] = alloca [2 x <2 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <4 x i32> <i32 0, i32 1, i32 4, i32 5> @@ -106,8 +106,8 @@ // CHECK-LABEL: define hidden noundef <2 x i32> @_Z11trunc_cast5u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I21:%.*]] = alloca [2 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I21:%.*]] = alloca [2 x <1 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <2 x i32> <i32 0, i32 4> @@ -123,7 +123,7 @@ // CHECK-LABEL: define hidden noundef i32 @_Z11trunc_cast6u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 // CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 @@ -140,7 +140,7 @@ // CHECK-LABEL: define hidden noundef i32 @_Z16trunc_multi_castu11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 // CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl index e621f68623bd1..b58f567eb51d3 100644 --- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl +++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl @@ -4,8 +4,8 @@ // CHECK-LABEL: define hidden noundef <12 x i32> @_Z10trunc_castu11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I34:%.*]] = alloca [12 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I34:%.*]] = alloca [3 x <4 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11> @@ -21,8 +21,8 @@ // CHECK-LABEL: define hidden noundef <12 x i32> @_Z11trunc_cast0u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I43:%.*]] = alloca [12 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I43:%.*]] = alloca [4 x <3 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10, i32 12, i32 13, i32 14> @@ -38,8 +38,8 @@ // CHECK-LABEL: define hidden noundef <9 x i32> @_Z11trunc_cast1u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I33:%.*]] = alloca [9 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I33:%.*]] = alloca [3 x <3 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 8, i32 9, i32 10> @@ -55,8 +55,8 @@ // CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast2u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I32:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I32:%.*]] = alloca [3 x <2 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9> @@ -72,8 +72,8 @@ // CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast3u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 -// CHECK-NEXT: [[I23:%.*]] = alloca [6 x i32], align 4 +// CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [4 x <4 x i32>], align 4 +// CHECK-NEXT: [[I23:%.*]] = alloca [2 x <3 x i32>], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <6 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6> @@ -89,8 +89,8 @@ // CHECK-LABEL: define hidden noundef <4 x i32> @_Z11trunc_cast4u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[I44_ADDR:%.... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/179861 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
