================
@@ -272,12 +274,18 @@ void HIPAMDToolChain::addClangTargetOptions(
// with options that match the user-supplied ones.
if (!DriverArgs.hasArg(options::OPT_fembed_bitcode_marker))
CC1Args.push_back("-fembed-bitcode=marker");
- // For SPIR-V we want to retain the pristine output of Clang CodeGen, since
- // optimizations might lose structure / information that is necessary for
- // generating optimal concrete AMDGPU code. We duplicate this because the
- // HIP TC doesn't invoke the base AMDGPU TC addClangTargetOptions.
- if (!DriverArgs.hasArg(options::OPT_disable_llvm_passes))
- CC1Args.push_back("-disable-llvm-passes");
+ // Enable basic optimizations but disable target-specific transformations
+ // that could harm JIT performance. The JIT will make target-specific
+ // decisions. Users can pass -disable-llvm-passes to disable all opts.
+ if (!DriverArgs.hasArg(options::OPT_disable_llvm_passes)) {
+ // Disable vectorization (problematic with SPIR-V, let JIT decide)
+ CC1Args.append({"-mllvm", "-vectorize-loops=false"});
+ CC1Args.append({"-mllvm", "-vectorize-slp=false"});
+ // Disable loop unrolling (let JIT decide based on target)
+ CC1Args.push_back("-fno-unroll-loops");
+ // Disable loop interleaving
----------------
maarquitos14 wrote:
```suggestion
// Disable loop interleaving.
```
https://github.com/llvm/llvm-project/pull/189383
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