================
@@ -2224,6 +2216,35 @@ void AArch64DAGToDAGISel::SelectFrintFromVT(SDNode *N,
unsigned NumVecs,
SelectUnaryMultiIntrinsic(N, NumVecs, true, Opcode);
}
+void AArch64DAGToDAGISel::EmitMultiVectorLutiLane(SDNode *Node,
+ unsigned NumOutVecs,
+ unsigned Opc,
+ ArrayRef<SDValue> Ops,
+ bool HasChain) {
+ SDLoc DL(Node);
+ EVT VT = Node->getValueType(0);
+
+ SmallVector<SDValue, 4> MachineOps(Ops);
+ SDNode *Instruction;
+ if (HasChain) {
+ MachineOps.push_back(Node->getOperand(0));
+ Instruction =
+ CurDAG->getMachineNode(Opc, DL, {MVT::Untyped, MVT::Other},
MachineOps);
+ } else {
+ Instruction = CurDAG->getMachineNode(Opc, DL, MVT::Untyped, MachineOps);
+ }
----------------
jthackray wrote:
Yep, good spot. Thanks, fixed.
https://github.com/llvm/llvm-project/pull/187046
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
