[clang] [llvm] [AArch64][clang][llvm] Add support for Armv9.7-A lookup table intrinsics (PR #187046)

[via cfe-commits]

================
@@ -2800,12 +2800,24 @@ def int_aarch64_sve_tbx  : 
AdvSIMD_SVE2_TBX_Intrinsic<[IntrSpeculatable]>;
 
 def int_aarch64_sve_luti2_lane : SVE2_LUTI_Inrinsic<[IntrSpeculatable]>;
 def int_aarch64_sve_luti4_lane : SVE2_LUTI_Inrinsic<[IntrSpeculatable]>;
+def int_aarch64_sve_luti6 : DefaultAttrsIntrinsic<[llvm_nxv16i8_ty],
+                                  [llvm_nxv16i8_ty,
+                                   llvm_nxv16i8_ty,
----------------
CarolineConcatto wrote:

Why not create a class 
DefaultAttrsIntrinsic<[llvm_anyvector_ty],
                                    [LLVMMatchType<0>,
                                    LLVMMatchType<0>,
                                    llvm_nxv16i8_ty,
                                    llvm_i32_ty],
                                    [IntrNoMem, ImmArg<ArgIndex<3>>, 
IntrSpeculatable]>;

and then re-use for :
int_aarch64_sve_luti4_lane_x2
and
int_aarch64_sve_luti6_lane_x2

https://github.com/llvm/llvm-project/pull/187046
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