Author: Dan Liew Date: 2026-04-09T17:24:54-07:00 New Revision: 47678c6e02b31e69473f35749e6e7bd3460ce620
URL: https://github.com/llvm/llvm-project/commit/47678c6e02b31e69473f35749e6e7bd3460ce620 DIFF: https://github.com/llvm/llvm-project/commit/47678c6e02b31e69473f35749e6e7bd3460ce620.diff LOG: Revert "[X86][APX] Add copy instruction to LiveInterval of SrcReg (#191102) (#191330) This reverts commit 16f02c0940d6ee783c38ca27b44fc158d77e7567. This caused a bot failure when building with expensive checks. https://ci.swift.org/job/llvm.org/job/clang-stage1-RA-expensive/job/main/409/testReport/junit/Clang/CodeGen_X86/pr190962_ll/ The test case included in the original commit fails with: ``` | *** Bad machine code: Two-address instruction operands must be identical *** | - function: foo | - basic block: %bb.0 (0x7fc688853c40) [0B;192B) | - instruction: 128B %10:gr64 = IMUL64rm %33:gr64(tied-def 0), %fixed-stack.1, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s64) from %fixed-stack.1, align 16) | - operand 1: %33:gr64(tied-def 0) | fatal error: error in backend: Found 1 machine code errors. ``` Conflicts: clang/test/CodeGen/X86/pr190962.ll Added: Modified: llvm/lib/Target/X86/X86FastISel.cpp llvm/lib/Target/X86/X86InstrInfo.cpp llvm/lib/Target/X86/X86InstrInfo.h Removed: clang/test/CodeGen/X86/pr190962.ll ################################################################################ diff --git a/clang/test/CodeGen/X86/pr190962.ll b/clang/test/CodeGen/X86/pr190962.ll deleted file mode 100644 index a6b9bd26136a6..0000000000000 --- a/clang/test/CodeGen/X86/pr190962.ll +++ /dev/null @@ -1,65 +0,0 @@ -; REQUIRES: x86-registered-target -; RUN: %clang -O1 -mapx-features=ndd --target=x86_64-pc-windows-gnu -S %s -o /dev/null - -;; Check no crash when building below IR with Clang. - -define i32 @foo(ptr %0, ptr %1, ptr %2, i64 %3, i64 %4, i64 %5) { - %7 = call i64 @"_ZZN3jxl15PatchDictionary6DecodeEP22JxlMemoryManagerStructPNS_9BitReaderEyyyPbENK3$_0clEy"() - %8 = mul i64 %3, %4 - %9 = icmp ugt i64 1, %8 - br i1 %9, label %common.ret1, label %10 - -common.ret1: ; preds = %26, %23, %16, %6 - %common.ret1.op = phi i32 [ 0, %23 ], [ 0, %16 ], [ 0, %26 ], [ 0, %6 ] - ret i32 %common.ret1.op - -10: ; preds = %6 - %11 = load volatile i64, ptr null, align 8 - %12 = call i64 @"_ZZN3jxl15PatchDictionary6DecodeEP22JxlMemoryManagerStructPNS_9BitReaderEyyyPbENK3$_0clEy"() - %13 = load volatile i64, ptr null, align 8 - %14 = or i64 %11, %5 - %15 = icmp ugt i64 %14, 0 - br i1 %15, label %16, label %19 - -16: ; preds = %10 - call void @_ZN3jxl6StatusC2ENS_10StatusCodeE() - %17 = load i32, ptr null, align 4 - %18 = call i32 (i32, ptr, ...) @_ZN3jxl13StatusMessageENS_6StatusEPKcz(i32 %17, ptr null, ptr null, i32 0) - call void @_ZN3jxl6StatusC2ENS_10StatusCodeE() - br label %common.ret1 - -19: ; preds = %10 - %20 = call i64 @_ZNK3jxl11ImageBundle5ysizeEv(ptr %1) - %21 = or i64 %12, %13 - %22 = icmp ugt i64 %21, 0 - br i1 %22, label %23, label %26 - -23: ; preds = %19 - call void @_ZN3jxl6StatusC2ENS_10StatusCodeE() - %24 = load i32, ptr null, align 4 - %25 = call i32 (i32, ptr, ...) @_ZN3jxl13StatusMessageENS_6StatusEPKcz(i32 %24, ptr null, ptr null, i32 1) - call void @_ZN3jxl6StatusC2ENS_10StatusCodeE() - br label %common.ret1 - -26: ; preds = %19 - %27 = icmp ugt i64 1, %3 - br i1 %27, label %common.ret1, label %28 - -28: ; preds = %26 - store i32 0, ptr %0, align 4 - %29 = call i32 (i32, ptr, ...) @_ZN3jxl13StatusMessageENS_6StatusEPKcz(i32 0, ptr null, ptr null, i32 0, i64 0, i64 0, i64 %4) - unreachable -} - -declare i32 @_ZN3jxl13StatusMessageENS_6StatusEPKcz(i32, ptr, ...) - -declare i64 @"_ZZN3jxl15PatchDictionary6DecodeEP22JxlMemoryManagerStructPNS_9BitReaderEyyyPbENK3$_0clEy"() - -declare void @_ZN3jxl6StatusC2ENS_10StatusCodeE() - -declare i64 @_ZNK3jxl11ImageBundle5ysizeEv(ptr) - -; uselistorder directives -uselistorder ptr @_ZN3jxl13StatusMessageENS_6StatusEPKcz, { 2, 1, 0 } -uselistorder ptr @"_ZZN3jxl15PatchDictionary6DecodeEP22JxlMemoryManagerStructPNS_9BitReaderEyyyPbENK3$_0clEy", { 1, 0 } -uselistorder ptr @_ZN3jxl6StatusC2ENS_10StatusCodeE, { 3, 2, 1, 0 } diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index a86f9c7351b49..3dbe6d14c610e 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -3994,7 +3994,7 @@ bool X86FastISel::tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo, MachineInstr *Result = XII.foldMemoryOperandImpl( *FuncInfo.MF, *MI, OpNo, AddrOps, FuncInfo.InsertPt, Size, LI->getAlign(), - /*AllowCommute=*/true, /*LIS=*/nullptr); + /*AllowCommute=*/true); if (!Result) return false; diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 525f6c8aa39c7..5b6858f59e6d6 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -7485,8 +7485,7 @@ static void printFailMsgforFold(const MachineInstr &MI, unsigned Idx) { MachineInstr *X86InstrInfo::foldMemoryOperandImpl( MachineFunction &MF, MachineInstr &MI, unsigned OpNum, ArrayRef<MachineOperand> MOs, MachineBasicBlock::iterator InsertPt, - unsigned Size, Align Alignment, bool AllowCommute, - LiveIntervals *LIS) const { + unsigned Size, Align Alignment, bool AllowCommute) const { bool isSlowTwoMemOps = Subtarget.slowTwoMemOps(); unsigned Opc = MI.getOpcode(); @@ -7600,20 +7599,11 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl( const TargetRegisterClass &RC = *MF.getRegInfo().getRegClass(SrcReg); Register NewSrc = MF.getRegInfo().createVirtualRegister(&RC); - MachineInstr *Copy = BuildMI(*NewMI->getParent(), *NewMI, - MI.getDebugLoc(), get(TargetOpcode::COPY)) - .addReg(NewSrc, RegState::Define) - .addReg(SrcReg); + BuildMI(*NewMI->getParent(), *NewMI, MI.getDebugLoc(), + get(TargetOpcode::COPY)) + .addReg(NewSrc, RegState::Define) + .addReg(SrcReg); NewMI->getOperand(1).setReg(NewSrc); - - if (LIS) { - SlotIndex CopyIdx = LIS->InsertMachineInstrInMaps(*Copy); - SlotIndex Idx = LIS->getInstructionIndex(MI); - LiveInterval &LI = LIS->getInterval(SrcReg); - LiveRange::Segment *S = LI.getSegmentContaining(Idx); - if (S->end.getBaseIndex() == Idx) - S->end = CopyIdx.getRegSlot(); - } } return NewMI; } @@ -7628,7 +7618,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl( } // Attempt to fold with the commuted version of the instruction. NewMI = foldMemoryOperandImpl(MF, MI, CommuteOpIdx2, MOs, InsertPt, Size, - Alignment, /*AllowCommute=*/false, LIS); + Alignment, /*AllowCommute=*/false); if (NewMI) return NewMI; // Folding failed again - undo the commute before returning. @@ -7677,7 +7667,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl( auto Impl = [&]() { return foldMemoryOperandImpl(MF, MI, Ops[0], MachineOperand::CreateFI(FrameIndex), InsertPt, - Size, Alignment, /*AllowCommute=*/true, LIS); + Size, Alignment, /*AllowCommute=*/true); }; if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) { unsigned NewOpc = 0; @@ -8454,8 +8444,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl( } } return foldMemoryOperandImpl(MF, MI, Ops[0], MOs, InsertPt, - /*Size=*/0, Alignment, /*AllowCommute=*/true, - LIS); + /*Size=*/0, Alignment, /*AllowCommute=*/true); } MachineInstr * diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h index 660cb0823336f..9695d9a79ec96 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.h +++ b/llvm/lib/Target/X86/X86InstrInfo.h @@ -582,8 +582,7 @@ class X86InstrInfo final : public X86GenInstrInfo { ArrayRef<MachineOperand> MOs, MachineBasicBlock::iterator InsertPt, unsigned Size, Align Alignment, - bool AllowCommute, - LiveIntervals *LIS) const; + bool AllowCommute) const; bool isHighLatencyDef(int opc) const override; _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
