https://github.com/jacquesguan updated https://github.com/llvm/llvm-project/pull/196013
>From 341a0efdb859d06b0f6115e0914773959b9d8d1e Mon Sep 17 00:00:00 2001 From: Jianjian GUAN <[email protected]> Date: Sat, 2 May 2026 16:03:39 +0800 Subject: [PATCH 1/2] [CIR][RISCV] Support zknh builtin codegen Support sha256sig0, sha256sig1, sha256sum0, sha256sum1 builtins. --- clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp | 20 +++++-- .../CIR/CodeGenBuiltins/RISCV/riscv-zknh.c | 58 +++++++++++++++++++ 2 files changed, 74 insertions(+), 4 deletions(-) create mode 100644 clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp index bbd1cd8d04401..d0d747a838176 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp @@ -95,10 +95,22 @@ CIRGenFunction::emitRISCVBuiltinExpr(unsigned builtinID, const CallExpr *e) { break; } // Zknh - case RISCV::BI__builtin_riscv_sha256sig0: - case RISCV::BI__builtin_riscv_sha256sig1: - case RISCV::BI__builtin_riscv_sha256sum0: - case RISCV::BI__builtin_riscv_sha256sum1: + case RISCV::BI__builtin_riscv_sha256sig0: { + intrinsicName = "riscv.sha256sig0"; + break; + } + case RISCV::BI__builtin_riscv_sha256sig1: { + intrinsicName = "riscv.sha256sig1"; + break; + } + case RISCV::BI__builtin_riscv_sha256sum0: { + intrinsicName = "riscv.sha256sum0"; + break; + } + case RISCV::BI__builtin_riscv_sha256sum1: { + intrinsicName = "riscv.sha256sum1"; + break; + } // Zksed case RISCV::BI__builtin_riscv_sm4ks: case RISCV::BI__builtin_riscv_sm4ed: diff --git a/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c new file mode 100644 index 0000000000000..1c08ac4811808 --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c @@ -0,0 +1,58 @@ +// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR +// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR +// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=OGCG + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sig0( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sig0" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sig0( +// LLVM: call i32 @llvm.riscv.sha256sig0(i32 {{%.*}}) +// LLVM: ret i32 +// OGCG-LABEL: @test_builtin_sha256sig0( +// OGCG: call i32 @llvm.riscv.sha256sig0(i32 {{%.*}}) +// OGCG: ret i32 +unsigned int test_builtin_sha256sig0(unsigned int a) { + return __builtin_riscv_sha256sig0(a); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sig1( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sig1" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sig1( +// LLVM: call i32 @llvm.riscv.sha256sig1(i32 {{%.*}}) +// LLVM: ret i32 +// OGCG-LABEL: @test_builtin_sha256sig1( +// OGCG: call i32 @llvm.riscv.sha256sig1(i32 {{%.*}}) +// OGCG: ret i32 +unsigned int test_builtin_sha256sig1(unsigned int a) { + return __builtin_riscv_sha256sig1(a); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sum0( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sum0" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sum0( +// LLVM: call i32 @llvm.riscv.sha256sum0(i32 {{%.*}}) +// LLVM: ret i32 +// OGCG-LABEL: @test_builtin_sha256sum0( +// OGCG: call i32 @llvm.riscv.sha256sum0(i32 {{%.*}}) +// OGCG: ret i32 +unsigned int test_builtin_sha256sum0(unsigned int a) { + return __builtin_riscv_sha256sum0(a); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sum1( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sum1" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sum1( +// LLVM: call i32 @llvm.riscv.sha256sum1(i32 {{%.*}}) +// LLVM: ret i32 +// OGCG-LABEL: @test_builtin_sha256sum1( +// OGCG: call i32 @llvm.riscv.sha256sum1(i32 {{%.*}}) +// OGCG: ret i32 +unsigned int test_builtin_sha256sum1(unsigned int a) { + return __builtin_riscv_sha256sum1(a); +} >From 11687fdd7460e16baa39e65f1982cebdbc645b96 Mon Sep 17 00:00:00 2001 From: Jianjian GUAN <[email protected]> Date: Wed, 6 May 2026 15:03:43 +0800 Subject: [PATCH 2/2] Merge checks --- .../test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c index 1c08ac4811808..05dc84571338c 100644 --- a/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c +++ b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c @@ -2,8 +2,8 @@ // RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR // RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM // RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM -// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=OGCG -// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM // CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sig0( // CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sig0" {{%.*}} : (!u32i) -> !u32i @@ -11,9 +11,6 @@ // LLVM-LABEL: @test_builtin_sha256sig0( // LLVM: call i32 @llvm.riscv.sha256sig0(i32 {{%.*}}) // LLVM: ret i32 -// OGCG-LABEL: @test_builtin_sha256sig0( -// OGCG: call i32 @llvm.riscv.sha256sig0(i32 {{%.*}}) -// OGCG: ret i32 unsigned int test_builtin_sha256sig0(unsigned int a) { return __builtin_riscv_sha256sig0(a); } @@ -24,9 +21,6 @@ unsigned int test_builtin_sha256sig0(unsigned int a) { // LLVM-LABEL: @test_builtin_sha256sig1( // LLVM: call i32 @llvm.riscv.sha256sig1(i32 {{%.*}}) // LLVM: ret i32 -// OGCG-LABEL: @test_builtin_sha256sig1( -// OGCG: call i32 @llvm.riscv.sha256sig1(i32 {{%.*}}) -// OGCG: ret i32 unsigned int test_builtin_sha256sig1(unsigned int a) { return __builtin_riscv_sha256sig1(a); } @@ -37,9 +31,6 @@ unsigned int test_builtin_sha256sig1(unsigned int a) { // LLVM-LABEL: @test_builtin_sha256sum0( // LLVM: call i32 @llvm.riscv.sha256sum0(i32 {{%.*}}) // LLVM: ret i32 -// OGCG-LABEL: @test_builtin_sha256sum0( -// OGCG: call i32 @llvm.riscv.sha256sum0(i32 {{%.*}}) -// OGCG: ret i32 unsigned int test_builtin_sha256sum0(unsigned int a) { return __builtin_riscv_sha256sum0(a); } @@ -50,9 +41,6 @@ unsigned int test_builtin_sha256sum0(unsigned int a) { // LLVM-LABEL: @test_builtin_sha256sum1( // LLVM: call i32 @llvm.riscv.sha256sum1(i32 {{%.*}}) // LLVM: ret i32 -// OGCG-LABEL: @test_builtin_sha256sum1( -// OGCG: call i32 @llvm.riscv.sha256sum1(i32 {{%.*}}) -// OGCG: ret i32 unsigned int test_builtin_sha256sum1(unsigned int a) { return __builtin_riscv_sha256sum1(a); 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