spaits wrote: If we disable the `addRegisterClass` the quad-prec fp registers in ISelLowering, then we will basically have the quad-prec. ABI string, but fp128 will be passed as soft float. That is bad.
If we enable it. It crashes. That's even worse. To add these ABIs the correct way, tested/stable on not just GISel, but on SelDAG to I will have to add some minimal code gen for Q. To be more precise minimal code gen: - so quad-prec. fp + non quad-prec. ABI will work together - Addressing the needs of `llvm/test/CodeGen/RISCV/calling-conv-*` tests. (That is going to be `fptosi fp128` codegen). https://github.com/llvm/llvm-project/pull/195166 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
