================
@@ -3935,6 +3939,22 @@ MachineBasicBlock::iterator
RISCVInstrInfo::insertOutlinedCall(
return It;
}
+void RISCVInstrInfo::buildClearRegister(Register Reg, MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator Iter,
+ DebugLoc &DL,
+ bool AllowSideEffects) const {
+
+ const MachineFunction &MF = *MBB.getParent();
+ const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>();
+ const RISCVRegisterInfo &TRI = *STI.getRegisterInfo();
+
+ if (TRI.isGeneralPurposeRegister(MF, Reg)) {
+ BuildMI(MBB, Iter, DL, get(RISCV::PseudoLI), Reg).addImm(0);
----------------
LucasChollet wrote:
Thanks for the insight, I'll give it a shot.
https://github.com/llvm/llvm-project/pull/194883
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