https://github.com/jacquesguan created https://github.com/llvm/llvm-project/pull/196463
None >From 1693090dcf07ac69bb367ed1a2201dde7bc850c7 Mon Sep 17 00:00:00 2001 From: Jianjian GUAN <[email protected]> Date: Fri, 8 May 2026 10:04:31 +0800 Subject: [PATCH] [CIR][RISCV] Support zksh builtin codegen --- clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp | 10 +++++-- .../CIR/CodeGenBuiltins/RISCV/riscv-zksh.c | 26 +++++++++++++++++++ 2 files changed, 34 insertions(+), 2 deletions(-) create mode 100644 clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zksh.c diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp index bd9202705d147..6793e3b11cef2 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp @@ -121,8 +121,14 @@ CIRGenFunction::emitRISCVBuiltinExpr(unsigned builtinID, const CallExpr *e) { break; } // Zksh - case RISCV::BI__builtin_riscv_sm3p0: - case RISCV::BI__builtin_riscv_sm3p1: + case RISCV::BI__builtin_riscv_sm3p0: { + intrinsicName = "riscv.sm3p0"; + break; + } + case RISCV::BI__builtin_riscv_sm3p1: { + intrinsicName = "riscv.sm3p1"; + break; + } // Zbb case RISCV::BI__builtin_riscv_clz_32: case RISCV::BI__builtin_riscv_clz_64: diff --git a/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zksh.c b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zksh.c new file mode 100644 index 0000000000000..97417ae038831 --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zksh.c @@ -0,0 +1,26 @@ +// RUN: %clang_cc1 -triple riscv32 -target-feature +zksh -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR +// RUN: %clang_cc1 -triple riscv64 -target-feature +zksh -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR +// RUN: %clang_cc1 -triple riscv32 -target-feature +zksh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv64 -target-feature +zksh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv32 -target-feature +zksh -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv64 -target-feature +zksh -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sm3p0( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sm3p0" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sm3p0( +// LLVM: call i32 @llvm.riscv.sm3p0(i32 {{%.*}}) +// LLVM: ret i32 +unsigned int test_builtin_sm3p0(unsigned int a) { + return __builtin_riscv_sm3p0(a); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sm3p1( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sm3p1" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sm3p1( +// LLVM: call i32 @llvm.riscv.sm3p1(i32 {{%.*}}) +// LLVM: ret i32 +unsigned int test_builtin_sm3p1(unsigned int a) { + return __builtin_riscv_sm3p1(a); +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
