================ @@ -0,0 +1,25 @@ +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1" +target triple = "spirv64" ---------------- bader wrote:
Please, combine these two inputs into one. It would be more efficient to validate. We should be able to verify `--module-split-mode=source` with a single tool invocation. https://github.com/llvm/llvm-project/pull/196435 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
