llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: AnkitDubeycs25 (AnkitDubeycs25) <details> <summary>Changes</summary> This patch updates Expr::isKnownToHaveBooleanValue to recognize unsigned _BitInt(1) as a boolean-valued expression when semantic strictness is not required. Since _BitInt(1) can only represent values 0 and 1, it behaves like a boolean in practice. This change improves Clang's heuristic reasoning without affecting strict semantic behavior. Changes: - Added handling for BitIntType - Treat unsigned _BitInt(1) as boolean-valued in non-semantic mode Testing: - Added AST regression test under clang/test/AST/bitint-bool.cpp - Verified correct parsing and condition handling --- Full diff: https://github.com/llvm/llvm-project/pull/196749.diff 4 Files Affected: - (modified) clang/lib/AST/Expr.cpp (+6) - (modified) clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp (+18-5) - (added) clang/test/AST/bitint-bool.cpp (+14) - (added) clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c (+18) ``````````diff diff --git a/clang/lib/AST/Expr.cpp b/clang/lib/AST/Expr.cpp index 64d61dbc3d128..67c4aad81580c 100644 --- a/clang/lib/AST/Expr.cpp +++ b/clang/lib/AST/Expr.cpp @@ -142,6 +142,12 @@ bool Expr::isKnownToHaveBooleanValue(bool Semantic) const { // If this is a non-scalar-integer type, we don't care enough to try. if (!E->getType()->isIntegralOrEnumerationType()) return false; + // [Fix] + if (!Semantic) + if (const auto *BIT = E->getType()->getAs<BitIntType>()) + if (BIT->isUnsigned() && BIT->getNumBits() == 1) + return true; + if (const UnaryOperator *UO = dyn_cast<UnaryOperator>(E)) { switch (UO->getOpcode()) { case UO_Plus: diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index 6ca8a0e7a460f..7932935dc41ff 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -86,6 +86,17 @@ static mlir::Value getMaskVecValue(CIRGenBuilderTy &builder, mlir::Location loc, return maskVec; } +static mlir::Value emitX86CompressStore(CIRGenBuilderTy &builder, + mlir::Location loc, + ArrayRef<mlir::Value> ops) { + auto resultTy = cast<cir::VectorType>(ops[1].getType()); + mlir::Value maskValue = + getMaskVecValue(builder, loc, ops[2], resultTy.getSize()); + mlir::Value ptr = ops[0]; + return emitIntrinsicCallOp(builder, loc, "masked_compressstore", resultTy, + mlir::ValueRange{ops[1], ptr, maskValue}); +} + // Builds the VecShuffleOp for pshuflw and pshufhw x86 builtins. // // The vector is split into lanes of 8 word elements (16 bits). The lower or @@ -1231,7 +1242,12 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) { case X86::BI__builtin_ia32_expandloadhi512_mask: case X86::BI__builtin_ia32_expandloadqi128_mask: case X86::BI__builtin_ia32_expandloadqi256_mask: - case X86::BI__builtin_ia32_expandloadqi512_mask: + case X86::BI__builtin_ia32_expandloadqi512_mask: { + cgm.errorNYI(expr->getSourceRange(), + std::string("unimplemented X86 builtin call: ") + + getContext().BuiltinInfo.getName(builtinID)); + return {}; + } case X86::BI__builtin_ia32_compressstoredf128_mask: case X86::BI__builtin_ia32_compressstoredf256_mask: case X86::BI__builtin_ia32_compressstoredf512_mask: @@ -1250,10 +1266,7 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) { case X86::BI__builtin_ia32_compressstoreqi128_mask: case X86::BI__builtin_ia32_compressstoreqi256_mask: case X86::BI__builtin_ia32_compressstoreqi512_mask: - cgm.errorNYI(expr->getSourceRange(), - std::string("unimplemented X86 builtin call: ") + - getContext().BuiltinInfo.getName(builtinID)); - return mlir::Value{}; + return emitX86CompressStore(builder, getLoc(expr->getExprLoc()), ops); case X86::BI__builtin_ia32_expanddf128_mask: case X86::BI__builtin_ia32_expanddf256_mask: case X86::BI__builtin_ia32_expanddf512_mask: diff --git a/clang/test/AST/bitint-bool.cpp b/clang/test/AST/bitint-bool.cpp new file mode 100644 index 0000000000000..2a040eabc1f99 --- /dev/null +++ b/clang/test/AST/bitint-bool.cpp @@ -0,0 +1,14 @@ +// RUN: %clang_cc1 -ast-dump %s | FileCheck %s +typedef unsigned _BitInt(1) b1; + +void test(b1 x) +{ + if (x) + { + int a = 1; + } +} + +// CHECK: FunctionDecl +// CHECK: IfStmt +// CHECK: ImplicitCastExpr \ No newline at end of file diff --git a/clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c b/clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c new file mode 100644 index 0000000000000..42134ef46fc4a --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c @@ -0,0 +1,18 @@ +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -target-feature +avx512vl -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -target-feature +avx512vl -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=OGCG --input-file=%t.ll %s + +#include <immintrin.h> + +void test_compress_store(void *__P, __mmask8 __U, __m128d __A) { + // CIR-LABEL: test_compress_store + // CIR: cir.call_llvm_intrinsic "masked_compressstore" + // LLVM-LABEL: @test_compress_store + // LLVM: @llvm.x86.avx512.mask.compress.store + // OGCG-LABEL: @test_compress_store + // OGCG: @llvm.x86.avx512.mask.compress.store + return _mm_mask_compressstoreu_pd(__P, __U, __A); +} \ No newline at end of file `````````` </details> https://github.com/llvm/llvm-project/pull/196749 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
