================
@@ -820,8 +820,13 @@ mlir::LogicalResult
CIRToLLVMSignBitOpLowering::matchAndRewrite(
mlir::LogicalResult CIRToLLVMAssumeOpLowering::matchAndRewrite(
cir::AssumeOp op, OpAdaptor adaptor,
mlir::ConversionPatternRewriter &rewriter) const {
- auto cond = adaptor.getPredicate();
- rewriter.replaceOpWithNewOp<mlir::LLVM::AssumeOp>(op, cond);
+ mlir::Value cond = adaptor.getPredicate();
+ if (std::optional<llvm::StringRef> tag = op.getBundleTag()) {
+ rewriter.replaceOpWithNewOp<mlir::LLVM::AssumeOp>(op, cond, *tag,
+ adaptor.getBundleArgs());
+ } else {
+ rewriter.replaceOpWithNewOp<mlir::LLVM::AssumeOp>(op, cond);
----------------
adams381 wrote:
Done -- under the new parallel-array bundle shape the lowering is a single
`replaceOpWithNewOp` forward of `(predicate, materialized
SmallVector<ValueRange>, op_bundle_tags ArrayAttr)`. Couldn't literally use
`value_or("")` because `llvm.assume`'s `(cond, StringRef tag, ValueRange args)`
builder always wraps into a one-bundle form (LLVMDialect.cpp:4321-4324), so an
empty tag would mean "one bundle with an empty tag," not "no bundle."
Forwarding the three parallel fields sidesteps that.
https://github.com/llvm/llvm-project/pull/197262
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