================
@@ -2800,12 +2808,13 @@ def int_aarch64_sve_tbx :
AdvSIMD_SVE2_TBX_Intrinsic<[IntrSpeculatable]>;
def int_aarch64_sve_luti2_lane : SVE2_LUTI_Inrinsic<[IntrSpeculatable]>;
def int_aarch64_sve_luti4_lane : SVE2_LUTI_Inrinsic<[IntrSpeculatable]>;
-def int_aarch64_sve_luti4_lane_x2 : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>,
- LLVMMatchType<0>,
- llvm_nxv16i8_ty,
- llvm_i32_ty],
- [IntrNoMem, ImmArg<ArgIndex<3>>,
IntrSpeculatable]>;
+def int_aarch64_sve_luti6 : DefaultAttrsIntrinsic<[llvm_nxv16i8_ty],
+ [llvm_nxv16i8_ty,
----------------
jthackray wrote:
Thanks, replaced with `SVE2_LUTI6_Intrinsic` which is defined similar to this.
I had to use:
```
class SVE2_LUTI6_Intrinsic<list<IntrinsicProperty> Attrs = []>
: DefaultAttrsIntrinsic<[llvm_nxv16i8_ty],
[llvm_nxv16i8_ty,
llvm_nxv16i8_ty,
llvm_nxv16i8_ty],
!listconcat(Attrs, [IntrNoMem])>;
```
because `int_aarch64_sve_luti6` isn't overloaded.
https://github.com/llvm/llvm-project/pull/187046
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