================
@@ -720,3 +720,548 @@ uint64x2_t test_vaddw_high_u32(uint64x2_t a, uint32x4_t
b) {
// LLVM-NEXT: ret <2 x i64> [[ADD_I]]
return vaddw_high_u32(a, b);
}
+
+//===----------------------------------------------------------------------===//
+// 2.1.1.1.3. Narrowing addition
+//
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#narrowing-addition
+//===----------------------------------------------------------------------===//
+
+// LLVM-LABEL: @test_vhadd_s8(
+// CIR-LABEL: @vhadd_s8(
+int8x8_t test_vhadd_s8(int8x8_t v1, int8x8_t v2) {
+ // CIR: cir.call_llvm_intrinsic "aarch64.neon.shadd"
+
+ // LLVM: call <8 x i8> @llvm.aarch64.neon.shadd.v8i8(<8 x i8> {{.*}}, <8 x
i8> {{.*}})
----------------
iamvickynguyen wrote:
Thank you! I've included the args checks.
Before, without `instcombine` (mentioned above), there were bitcasts between
the args and the call, so tracking the args would mean including the bitcast
checks. That's why, the original tests skipped tracking the args.
https://github.com/llvm/llvm-project/pull/204989
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