https://github.com/mikolaj-pirog updated https://github.com/llvm/llvm-project/pull/171172
From 1b4e46d3697aaa0d0d88117586393536eb406e57 Mon Sep 17 00:00:00 2001 From: "Pirog, Mikolaj Maciej" <[email protected]> Date: Thu, 4 Dec 2025 15:07:20 +0100 Subject: [PATCH 1/6] Sync multiversion features with libgcc and refactor internal cpu type tables --- clang/lib/Basic/Targets/X86.cpp | 6 +- clang/lib/CodeGen/TargetBuiltins/X86.cpp | 6 +- compiler-rt/lib/builtins/cpu_model/x86.c | 9 +- .../llvm/TargetParser/X86TargetParser.def | 126 +++++++++--------- .../llvm/TargetParser/X86TargetParser.h | 14 +- 5 files changed, 82 insertions(+), 79 deletions(-) diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index f00d435937b92..d5af21c155c8a 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -1363,11 +1363,11 @@ void X86TargetInfo::getCPUSpecificCPUDispatchFeatures( // rather than the full range of cpus. bool X86TargetInfo::validateCpuIs(StringRef FeatureStr) const { return llvm::StringSwitch<bool>(FeatureStr) -#define X86_VENDOR(ENUM, STRING) .Case(STRING, true) +#define X86_VENDOR(ENUM, STRING, ABI_VALUE) .Case(STRING, true) #define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true) -#define X86_CPU_TYPE(ENUM, STR) .Case(STR, true) +#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) .Case(STR, true) #define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true) -#define X86_CPU_SUBTYPE(ENUM, STR) .Case(STR, true) +#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) .Case(STR, true) #include "llvm/TargetParser/X86TargetParser.def" .Default(false); } diff --git a/clang/lib/CodeGen/TargetBuiltins/X86.cpp b/clang/lib/CodeGen/TargetBuiltins/X86.cpp index be2b7d442645e..f57544def1fe5 100644 --- a/clang/lib/CodeGen/TargetBuiltins/X86.cpp +++ b/clang/lib/CodeGen/TargetBuiltins/X86.cpp @@ -630,15 +630,15 @@ Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) { // Calculate the index needed to access the correct field based on the // range. Also adjust the expected value. auto [Index, Value] = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr) -#define X86_VENDOR(ENUM, STRING) \ +#define X86_VENDOR(ENUM, STRING, ABI_VALUE) \ .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)}) #define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) \ .Case(ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) -#define X86_CPU_TYPE(ENUM, STR) \ +#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) \ .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) #define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) \ .Case(ALIAS, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) -#define X86_CPU_SUBTYPE(ENUM, STR) \ +#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) \ .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) #include "llvm/TargetParser/X86TargetParser.def" .Default({0, 0}); diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c index 8b352cfe568d0..f52561a36622b 100644 --- a/compiler-rt/lib/builtins/cpu_model/x86.c +++ b/compiler-rt/lib/builtins/cpu_model/x86.c @@ -41,7 +41,8 @@ enum VendorSignatures { enum ProcessorVendors { VENDOR_INTEL = 1, VENDOR_AMD, - VENDOR_OTHER, + // VENDOR_ZHAOXIN + VENDOR_OTHER = 4, VENDOR_MAX }; @@ -104,8 +105,10 @@ enum ProcessorSubtypes { INTEL_COREI7_ARROWLAKE, INTEL_COREI7_ARROWLAKE_S, INTEL_COREI7_PANTHERLAKE, - AMDFAM1AH_ZNVER5, - INTEL_COREI7_DIAMONDRAPIDS, + // ZHAOXIN_FAM7H_YONGFENG + AMDFAM1AH_ZNVER5 = 36, + // ZHAOXIN_FAM7H_SHIJIDADAO + INTEL_COREI7_DIAMONDRAPIDS = 38, INTEL_COREI7_NOVALAKE, CPU_SUBTYPE_MAX }; diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.def b/llvm/include/llvm/TargetParser/X86TargetParser.def index 09592bcea27f4..8d401e62a6271 100644 --- a/llvm/include/llvm/TargetParser/X86TargetParser.def +++ b/llvm/include/llvm/TargetParser/X86TargetParser.def @@ -13,15 +13,17 @@ // NOTE: NO INCLUDE GUARD DESIRED! #ifndef X86_VENDOR -#define X86_VENDOR(ENUM, STR) +#define X86_VENDOR(ENUM, STR, ABI_VALUE) #endif -X86_VENDOR(VENDOR_INTEL, "intel") -X86_VENDOR(VENDOR_AMD, "amd") +X86_VENDOR(VENDOR_INTEL, "intel", 1) +X86_VENDOR(VENDOR_AMD, "amd", 2) +X86_VENDOR(VENDOR_OTHER, "other", 4) #undef X86_VENDOR // This macro is used for cpu types present in compiler-rt/libgcc. +// ABI_VALUE is used to match #ifndef X86_CPU_TYPE -#define X86_CPU_TYPE(ENUM, STR) +#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) #endif #ifndef X86_CPU_TYPE_ALIAS @@ -30,26 +32,26 @@ X86_VENDOR(VENDOR_AMD, "amd") // This list must match what is implemented in libgcc and compilert-rt. Clang // uses this to know how to implement __builtin_cpu_is. -X86_CPU_TYPE(INTEL_BONNELL, "bonnell") -X86_CPU_TYPE(INTEL_CORE2, "core2") -X86_CPU_TYPE(INTEL_COREI7, "corei7") -X86_CPU_TYPE(AMDFAM10H, "amdfam10h") -X86_CPU_TYPE(AMDFAM15H, "amdfam15h") -X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont") -X86_CPU_TYPE(INTEL_KNL, "knl") -X86_CPU_TYPE(AMD_BTVER1, "btver1") -X86_CPU_TYPE(AMD_BTVER2, "btver2") -X86_CPU_TYPE(AMDFAM17H, "amdfam17h") -X86_CPU_TYPE(INTEL_KNM, "knm") -X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont") -X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus") -X86_CPU_TYPE(INTEL_TREMONT, "tremont") -X86_CPU_TYPE(AMDFAM19H, "amdfam19h") -X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h") -X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest") -X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge") -X86_CPU_TYPE(INTEL_CLEARWATERFOREST, "clearwaterforest") -X86_CPU_TYPE(AMDFAM1AH, "amdfam1ah") +X86_CPU_TYPE(INTEL_BONNELL, "bonnell", 1) +X86_CPU_TYPE(INTEL_CORE2, "core2", 2) +X86_CPU_TYPE(INTEL_COREI7, "corei7", 3) +X86_CPU_TYPE(AMDFAM10H, "amdfam10h", 4) +X86_CPU_TYPE(AMDFAM15H, "amdfam15h", 5) +X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont", 6) +X86_CPU_TYPE(INTEL_KNL, "knl", 7) +X86_CPU_TYPE(AMD_BTVER1, "btver1", 8) +X86_CPU_TYPE(AMD_BTVER2, "btver2", 9) +X86_CPU_TYPE(AMDFAM17H, "amdfam17h", 10) +X86_CPU_TYPE(INTEL_KNM, "knm", 11) +X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont", 12) +X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus", 13) +X86_CPU_TYPE(INTEL_TREMONT, "tremont", 14) +X86_CPU_TYPE(AMDFAM19H, "amdfam19h", 15) +X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h", 16) +X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest", 17) +X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge", 18) +X86_CPU_TYPE(INTEL_CLEARWATERFOREST, "clearwaterforest", 19) +X86_CPU_TYPE(AMDFAM1AH, "amdfam1ah", 20) // Alternate names supported by __builtin_cpu_is and target multiversioning. X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom") @@ -63,7 +65,7 @@ X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm") // This macro is used for cpu subtypes present in compiler-rt/libgcc. #ifndef X86_CPU_SUBTYPE -#define X86_CPU_SUBTYPE(ENUM, STR) +#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) #endif #ifndef X86_CPU_SUBTYPE_ALIAS @@ -72,43 +74,43 @@ X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm") // This list must match what is implemented in libgcc and compilert-rt. Clang // uses this to know how to implement __builtin_cpu_is. -X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem") -X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere") -X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge") -X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona") -X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai") -X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul") -X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1") -X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2") -X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3") -X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4") -X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1") -X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge") -X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell") -X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell") -X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake") -X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512") -X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake") -X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client") -X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server") -X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2") -X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake") -X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake") -X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake") -X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids") -X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake") -X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3") -X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake") -X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui") -X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4") -X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids") -X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS_D,"graniterapids-d") -X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE, "arrowlake") -X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE_S, "arrowlake-s") -X86_CPU_SUBTYPE(INTEL_COREI7_PANTHERLAKE, "pantherlake") -X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5") -X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids") -X86_CPU_SUBTYPE(INTEL_COREI7_NOVALAKE, "novalake") +X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem", 1) +X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere", 2) +X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge", 3) +X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona", 4) +X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai", 5) +X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul", 6) +X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1", 7) +X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2", 8) +X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3", 9) +X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4", 10) +X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1", 11) +X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge", 12) +X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell", 13) +X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell", 14) +X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake", 15) +X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512", 16) +X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake", 17) +X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client", 18) +X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server", 19) +X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2", 20) +X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake", 21) +X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake", 22) +X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake", 23) +X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids", 24) +X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake", 25) +X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3", 26) +X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake", 27) +X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui", 28) +X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4", 29) +X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids", 30) +X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS_D,"graniterapids-d", 31) +X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE, "arrowlake", 32) +X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE_S, "arrowlake-s", 33) +X86_CPU_SUBTYPE(INTEL_COREI7_PANTHERLAKE, "pantherlake", 34) +X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5", 36) +X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids", 38) +X86_CPU_SUBTYPE(INTEL_COREI7_NOVALAKE, "novalake", 39) // Alternate names supported by __builtin_cpu_is and target multiversioning. X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake") diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.h b/llvm/include/llvm/TargetParser/X86TargetParser.h index 46061f9d1fc7d..e7075ff0ed763 100644 --- a/llvm/include/llvm/TargetParser/X86TargetParser.h +++ b/llvm/include/llvm/TargetParser/X86TargetParser.h @@ -27,19 +27,17 @@ namespace X86 { // This should be kept in sync with libcc/compiler-rt as its included by clang // as a proxy for what's in libgcc/compiler-rt. enum ProcessorVendors : unsigned { - VENDOR_DUMMY, -#define X86_VENDOR(ENUM, STRING) \ - ENUM, +#define X86_VENDOR(ENUM, STRING, ABI_VALUE) \ + ENUM = ABI_VALUE, #include "llvm/TargetParser/X86TargetParser.def" - VENDOR_OTHER }; // This should be kept in sync with libcc/compiler-rt as its included by clang // as a proxy for what's in libgcc/compiler-rt. enum ProcessorTypes : unsigned { CPU_TYPE_DUMMY, -#define X86_CPU_TYPE(ENUM, STRING) \ - ENUM, +#define X86_CPU_TYPE(ENUM, STRING, ABI_VALUE) \ + ENUM = ABI_VALUE, #include "llvm/TargetParser/X86TargetParser.def" CPU_TYPE_MAX }; @@ -48,8 +46,8 @@ enum ProcessorTypes : unsigned { // as a proxy for what's in libgcc/compiler-rt. enum ProcessorSubtypes : unsigned { CPU_SUBTYPE_DUMMY, -#define X86_CPU_SUBTYPE(ENUM, STRING) \ - ENUM, +#define X86_CPU_SUBTYPE(ENUM, STRING, ABI_VALUE) \ + ENUM = ABI_VALUE, #include "llvm/TargetParser/X86TargetParser.def" CPU_SUBTYPE_MAX }; From cf0bdd70907ab97821db47372fe2d4439e045cb0 Mon Sep 17 00:00:00 2001 From: "Pirog, Mikolaj Maciej" <[email protected]> Date: Mon, 8 Dec 2025 19:02:12 +0100 Subject: [PATCH 2/6] Further work --- clang/lib/CodeGen/TargetBuiltins/X86.cpp | 12 ++--- .../llvm/TargetParser/X86TargetParser.def | 47 +++++++------------ .../llvm/TargetParser/X86TargetParser.h | 20 ++------ llvm/lib/TargetParser/X86TargetParser.cpp | 4 +- 4 files changed, 28 insertions(+), 55 deletions(-) diff --git a/clang/lib/CodeGen/TargetBuiltins/X86.cpp b/clang/lib/CodeGen/TargetBuiltins/X86.cpp index f57544def1fe5..df63c1ce7b613 100644 --- a/clang/lib/CodeGen/TargetBuiltins/X86.cpp +++ b/clang/lib/CodeGen/TargetBuiltins/X86.cpp @@ -628,18 +628,14 @@ Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) { cast<llvm::GlobalValue>(CpuModel)->setDSOLocal(true); // Calculate the index needed to access the correct field based on the - // range. Also adjust the expected value. + // range. ABI_VALUE matches with compiler-rt/libgcc values. auto [Index, Value] = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr) #define X86_VENDOR(ENUM, STRING, ABI_VALUE) \ - .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)}) -#define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) \ - .Case(ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) + .Case(STRING, {0u, ABI_VALUE}) #define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) \ - .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)}) -#define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) \ - .Case(ALIAS, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) + .Case(STR, {1u, ABI_VALUE}) #define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) \ - .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)}) + .Case(STR, {2u, ABI_VALUE}) #include "llvm/TargetParser/X86TargetParser.def" .Default({0, 0}); assert(Value != 0 && "Invalid CPUStr passed to CpuIs"); diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.def b/llvm/include/llvm/TargetParser/X86TargetParser.def index 8d401e62a6271..f1b2898128e07 100644 --- a/llvm/include/llvm/TargetParser/X86TargetParser.def +++ b/llvm/include/llvm/TargetParser/X86TargetParser.def @@ -12,6 +12,9 @@ // NOTE: NO INCLUDE GUARD DESIRED! +// ABI_VALUE is used throughout the file by compiler frontend to match values +// in compiler-rt/libgcc. + #ifndef X86_VENDOR #define X86_VENDOR(ENUM, STR, ABI_VALUE) #endif @@ -20,16 +23,10 @@ X86_VENDOR(VENDOR_AMD, "amd", 2) X86_VENDOR(VENDOR_OTHER, "other", 4) #undef X86_VENDOR -// This macro is used for cpu types present in compiler-rt/libgcc. -// ABI_VALUE is used to match #ifndef X86_CPU_TYPE #define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) #endif -#ifndef X86_CPU_TYPE_ALIAS -#define X86_CPU_TYPE_ALIAS(ENUM, STR) -#endif - // This list must match what is implemented in libgcc and compilert-rt. Clang // uses this to know how to implement __builtin_cpu_is. X86_CPU_TYPE(INTEL_BONNELL, "bonnell", 1) @@ -53,14 +50,14 @@ X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge", 18) X86_CPU_TYPE(INTEL_CLEARWATERFOREST, "clearwaterforest", 19) X86_CPU_TYPE(AMDFAM1AH, "amdfam1ah", 20) -// Alternate names supported by __builtin_cpu_is and target multiversioning. -X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom") -X86_CPU_TYPE_ALIAS(AMDFAM10H, "amdfam10") -X86_CPU_TYPE_ALIAS(AMDFAM15H, "amdfam15") -X86_CPU_TYPE_ALIAS(AMDFAM1AH, "amdfam1a") -X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm") +// Aliases -- a different name for the same cpu, represented as having the same +// ABI_VALUE. +X86_CPU_TYPE(ATOM, "atom", 1) +X86_CPU_TYPE(AMDFAM10, "amdfam10", 4) +X86_CPU_TYPE(AMDFAM15, "amdfam15", 5) +X86_CPU_TYPE(AMDFAM1A, "amdfam1a", 20) +X86_CPU_TYPE(SLM, "slm", 6) -#undef X86_CPU_TYPE_ALIAS #undef X86_CPU_TYPE // This macro is used for cpu subtypes present in compiler-rt/libgcc. @@ -68,10 +65,6 @@ X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm") #define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) #endif -#ifndef X86_CPU_SUBTYPE_ALIAS -#define X86_CPU_SUBTYPE_ALIAS(ENUM, STR) -#endif - // This list must match what is implemented in libgcc and compilert-rt. Clang // uses this to know how to implement __builtin_cpu_is. X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem", 1) @@ -112,23 +105,19 @@ X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5", 36) X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids", 38) X86_CPU_SUBTYPE(INTEL_COREI7_NOVALAKE, "novalake", 39) -// Alternate names supported by __builtin_cpu_is and target multiversioning. -X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake") -X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "meteorlake") -X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_SAPPHIRERAPIDS, "emeraldrapids") -X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ARROWLAKE_S,"lunarlake") -X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "gracemont") -X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_PANTHERLAKE, "wildcatlake") +// Aliases +X86_CPU_SUBTYPE(INTEL_COREI7_RAPTORLAKE, "raptorlake", 25) +X86_CPU_SUBTYPE(INTEL_COREI7_METEORLAKE, "meteorlake", 25) +X86_CPU_SUBTYPE(INTEL_COREI7_EMERALRAPIDS, "emeraldrapids", 24) +X86_CPU_SUBTYPE(INTEL_COREI7_LUNARLAKE, "lunarlake", 33) +X86_CPU_SUBTYPE(INTEL_COREI7_GRACEMONT, "gracemont", 25) +X86_CPU_SUBTYPE(INTEL_COREI7_WILDCATLAKE, "wildcatlake", 34) -#undef X86_CPU_SUBTYPE_ALIAS #undef X86_CPU_SUBTYPE // X86_FEATURE_COMPAT is used for cpu types present in compiler-rt/libgcc (i.e. // types we can multiversion on). The third parameter PRIORITY is required // by the attribute 'target' checking. - -// Order of bits has to match what's implemented in compiler-rt/libgcc. That's what the -// ABI_VALUE is for - CodeGenFunction::GetX86CpuSupportsMask uses it. #ifndef X86_FEATURE_COMPAT #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY, ABI_VALUE) X86_FEATURE(ENUM, STR) #endif @@ -277,7 +266,7 @@ X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls") X86_FEATURE (LVI_CFI, "lvi-cfi") X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening") -// Max number of priorities. Priorities form a consecutive range +// Max number of priorities. Priorities form a consecutive range. #define MAX_PRIORITY 35 #undef X86_FEATURE_COMPAT diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.h b/llvm/include/llvm/TargetParser/X86TargetParser.h index e7075ff0ed763..d698592a86a56 100644 --- a/llvm/include/llvm/TargetParser/X86TargetParser.h +++ b/llvm/include/llvm/TargetParser/X86TargetParser.h @@ -24,36 +24,24 @@ class StringRef; namespace X86 { -// This should be kept in sync with libcc/compiler-rt as its included by clang -// as a proxy for what's in libgcc/compiler-rt. enum ProcessorVendors : unsigned { -#define X86_VENDOR(ENUM, STRING, ABI_VALUE) \ - ENUM = ABI_VALUE, +#define X86_VENDOR(ENUM, STRING, ABI_VALUE) ENUM, #include "llvm/TargetParser/X86TargetParser.def" + CPU_VENDOR_MAX }; -// This should be kept in sync with libcc/compiler-rt as its included by clang -// as a proxy for what's in libgcc/compiler-rt. enum ProcessorTypes : unsigned { - CPU_TYPE_DUMMY, -#define X86_CPU_TYPE(ENUM, STRING, ABI_VALUE) \ - ENUM = ABI_VALUE, +#define X86_CPU_TYPE(ENUM, STRING, ABI_VALUE) ENUM, #include "llvm/TargetParser/X86TargetParser.def" CPU_TYPE_MAX }; -// This should be kept in sync with libcc/compiler-rt as its included by clang -// as a proxy for what's in libgcc/compiler-rt. enum ProcessorSubtypes : unsigned { - CPU_SUBTYPE_DUMMY, -#define X86_CPU_SUBTYPE(ENUM, STRING, ABI_VALUE) \ - ENUM = ABI_VALUE, +#define X86_CPU_SUBTYPE(ENUM, STRING, ABI_VALUE) ENUM, #include "llvm/TargetParser/X86TargetParser.def" CPU_SUBTYPE_MAX }; -// This should be kept in sync with libcc/compiler-rt as it should be used -// by clang as a proxy for what's in libgcc/compiler-rt. enum ProcessorFeatures { #define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM, #include "llvm/TargetParser/X86TargetParser.def" diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp index 2810849e4af9e..c3365da6b0136 100644 --- a/llvm/lib/TargetParser/X86TargetParser.cpp +++ b/llvm/lib/TargetParser/X86TargetParser.cpp @@ -762,9 +762,9 @@ llvm::X86::getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs) { std::array<uint32_t, 4> FeatureMask{}; for (StringRef FeatureStr : FeatureStrs) { unsigned Feature = StringSwitch<unsigned>(FeatureStr) + // ABI_VALUE is used to match values in compiler-rt/libgcc #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE) -#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) \ - .Case(STR, ABI_VALUE) +#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE) #include "llvm/TargetParser/X86TargetParser.def" ; assert(Feature / 32 < FeatureMask.size()); From e3c8278650c1916f9de0e1f40c20fb76c0211165 Mon Sep 17 00:00:00 2001 From: "Pirog, Mikolaj Maciej" <[email protected]> Date: Mon, 8 Dec 2025 19:03:38 +0100 Subject: [PATCH 3/6] Further work --- clang/lib/Basic/Targets/X86.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index d5af21c155c8a..0c72229623eb1 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -1364,9 +1364,7 @@ void X86TargetInfo::getCPUSpecificCPUDispatchFeatures( bool X86TargetInfo::validateCpuIs(StringRef FeatureStr) const { return llvm::StringSwitch<bool>(FeatureStr) #define X86_VENDOR(ENUM, STRING, ABI_VALUE) .Case(STRING, true) -#define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true) #define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) .Case(STR, true) -#define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true) #define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) .Case(STR, true) #include "llvm/TargetParser/X86TargetParser.def" .Default(false); From 61c0d73358bec7f405bf1ab51118b989e4db9820 Mon Sep 17 00:00:00 2001 From: "Pirog, Mikolaj Maciej" <[email protected]> Date: Tue, 9 Dec 2025 12:49:14 +0100 Subject: [PATCH 4/6] Format --- clang/lib/CodeGen/TargetBuiltins/X86.cpp | 9 +++------ llvm/lib/TargetParser/X86TargetParser.cpp | 5 +++-- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/clang/lib/CodeGen/TargetBuiltins/X86.cpp b/clang/lib/CodeGen/TargetBuiltins/X86.cpp index df63c1ce7b613..f243856e34cbf 100644 --- a/clang/lib/CodeGen/TargetBuiltins/X86.cpp +++ b/clang/lib/CodeGen/TargetBuiltins/X86.cpp @@ -630,12 +630,9 @@ Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) { // Calculate the index needed to access the correct field based on the // range. ABI_VALUE matches with compiler-rt/libgcc values. auto [Index, Value] = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr) -#define X86_VENDOR(ENUM, STRING, ABI_VALUE) \ - .Case(STRING, {0u, ABI_VALUE}) -#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) \ - .Case(STR, {1u, ABI_VALUE}) -#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) \ - .Case(STR, {2u, ABI_VALUE}) +#define X86_VENDOR(ENUM, STRING, ABI_VALUE) .Case(STRING, {0u, ABI_VALUE}) +#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) .Case(STR, {1u, ABI_VALUE}) +#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) .Case(STR, {2u, ABI_VALUE}) #include "llvm/TargetParser/X86TargetParser.def" .Default({0, 0}); assert(Value != 0 && "Invalid CPUStr passed to CpuIs"); diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp index c3365da6b0136..dddf1fe862fa2 100644 --- a/llvm/lib/TargetParser/X86TargetParser.cpp +++ b/llvm/lib/TargetParser/X86TargetParser.cpp @@ -762,9 +762,10 @@ llvm::X86::getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs) { std::array<uint32_t, 4> FeatureMask{}; for (StringRef FeatureStr : FeatureStrs) { unsigned Feature = StringSwitch<unsigned>(FeatureStr) - // ABI_VALUE is used to match values in compiler-rt/libgcc + // ABI_VALUE is used to match values in compiler-rt/libgcc #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE) -#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE) +#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) \ + .Case(STR, ABI_VALUE) #include "llvm/TargetParser/X86TargetParser.def" ; assert(Feature / 32 < FeatureMask.size()); From b527fb6b5d0bcdf5968c04acc7f2e7c0dfe5b17d Mon Sep 17 00:00:00 2001 From: "Pirog, Mikolaj Maciej" <[email protected]> Date: Wed, 1 Jul 2026 18:33:37 +0200 Subject: [PATCH 5/6] add test --- clang/test/CodeGen/builtin-cpu-is.c | 124 ++++++++++++++++++++++++++++ 1 file changed, 124 insertions(+) diff --git a/clang/test/CodeGen/builtin-cpu-is.c b/clang/test/CodeGen/builtin-cpu-is.c index a1d32e2b4bac2..d2142b3ce4ddb 100644 --- a/clang/test/CodeGen/builtin-cpu-is.c +++ b/clang/test/CodeGen/builtin-cpu-is.c @@ -53,3 +53,127 @@ void nehalem(void) { // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 1 } + +void other(void) { + if (__builtin_cpu_is("other")) + a("other"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_model + // CHECK: = icmp eq i32 [[LOAD]], 4 +} + +// A type alias must map to the same ABI value as its canonical entry. +void slm(void) { + if (__builtin_cpu_is("slm")) + a("slm"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 6 +} + +void amdfam10(void) { + if (__builtin_cpu_is("amdfam10")) + a("amdfam10"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 4 +} + +// Subtype ABI values below have gaps reserved for Zhaoxin CPUs; they must +// match the values implemented in compiler-rt/libgcc exactly. +void znver5(void) { + if (__builtin_cpu_is("znver5")) + a("znver5"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 36 +} + +void diamondrapids(void) { + if (__builtin_cpu_is("diamondrapids")) + a("diamondrapids"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 38 +} + +void novalake(void) { + if (__builtin_cpu_is("novalake")) + a("novalake"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 39 +} + +void znver6(void) { + if (__builtin_cpu_is("znver6")) + a("znver6"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 40 +} + +void c86_4g_m4(void) { + if (__builtin_cpu_is("c86-4g-m4")) + a("c86-4g-m4"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 41 +} + +void c86_4g_m8(void) { + if (__builtin_cpu_is("c86-4g-m8")) + a("c86-4g-m8"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 44 +} + +// Subtype aliases must map to the same ABI value as their canonical entry. +void raptorlake(void) { + if (__builtin_cpu_is("raptorlake")) + a("raptorlake"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 25 +} + +void meteorlake(void) { + if (__builtin_cpu_is("meteorlake")) + a("meteorlake"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 25 +} + +void gracemont(void) { + if (__builtin_cpu_is("gracemont")) + a("gracemont"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 25 +} + +void emeraldrapids(void) { + if (__builtin_cpu_is("emeraldrapids")) + a("emeraldrapids"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 24 +} + +void lunarlake(void) { + if (__builtin_cpu_is("lunarlake")) + a("lunarlake"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 33 +} + +void wildcatlake(void) { + if (__builtin_cpu_is("wildcatlake")) + a("wildcatlake"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 34 +} From e9f9df22c047e1ff76c52eb9bbf94aed143052d4 Mon Sep 17 00:00:00 2001 From: "Pirog, Mikolaj Maciej" <[email protected]> Date: Wed, 1 Jul 2026 18:54:57 +0200 Subject: [PATCH 6/6] Add more test --- clang/test/CodeGen/builtin-cpu-is.c | 624 +++++++++++- clang/test/CodeGen/builtin-cpu-supports-all.c | 963 ++++++++++++++++++ 2 files changed, 1538 insertions(+), 49 deletions(-) create mode 100644 clang/test/CodeGen/builtin-cpu-supports-all.c diff --git a/clang/test/CodeGen/builtin-cpu-is.c b/clang/test/CodeGen/builtin-cpu-is.c index d2142b3ce4ddb..86955da5ff829 100644 --- a/clang/test/CodeGen/builtin-cpu-is.c +++ b/clang/test/CodeGen/builtin-cpu-is.c @@ -1,179 +1,705 @@ // RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s| FileCheck %s -// Test that we have the structure definition, the gep offsets, the name of the -// global, the bit grab, and the icmp correct. +// Test that __builtin_cpu_is emits the correct ABI value and field offset +// for every vendor, cpu type, and cpu subtype (including aliases) listed in +// llvm/include/llvm/TargetParser/X86TargetParser.def. These values are an ABI +// contract shared with compiler-rt/libgcc. extern void a(const char *); // CHECK: @__cpu_model = external dso_local global { i32, i32, i32, [1 x i32] } -void intel(void) { +// Vendors (field offset 0). +void test_intel(void) { if (__builtin_cpu_is("intel")) a("intel"); + // CHECK-LABEL: define{{.*}} void @test_intel( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_model // CHECK: = icmp eq i32 [[LOAD]], 1 } -void amd(void) { +void test_amd(void) { if (__builtin_cpu_is("amd")) a("amd"); + // CHECK-LABEL: define{{.*}} void @test_amd( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_model // CHECK: = icmp eq i32 [[LOAD]], 2 } -void atom(void) { - if (__builtin_cpu_is("atom")) - a("atom"); +void test_other(void) { + if (__builtin_cpu_is("other")) + a("other"); + + // CHECK-LABEL: define{{.*}} void @test_other( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_model + // CHECK: = icmp eq i32 [[LOAD]], 4 +} + +// CPU types (field offset 4). +void test_bonnell(void) { + if (__builtin_cpu_is("bonnell")) + a("bonnell"); + // CHECK-LABEL: define{{.*}} void @test_bonnell( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) // CHECK: = icmp eq i32 [[LOAD]], 1 } -void amdfam10h(void) { +void test_core2(void) { + if (__builtin_cpu_is("core2")) + a("core2"); + + // CHECK-LABEL: define{{.*}} void @test_core2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 2 +} + +void test_corei7(void) { + if (__builtin_cpu_is("corei7")) + a("corei7"); + + // CHECK-LABEL: define{{.*}} void @test_corei7( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 3 +} + +void test_amdfam10h(void) { if (__builtin_cpu_is("amdfam10h")) a("amdfam10h"); + // CHECK-LABEL: define{{.*}} void @test_amdfam10h( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) // CHECK: = icmp eq i32 [[LOAD]], 4 } -void barcelona(void) { - if (__builtin_cpu_is("barcelona")) - a("barcelona"); +void test_amdfam15h(void) { + if (__builtin_cpu_is("amdfam15h")) + a("amdfam15h"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) - // CHECK: = icmp eq i32 [[LOAD]], 4 + // CHECK-LABEL: define{{.*}} void @test_amdfam15h( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 5 } -void nehalem(void) { - if (__builtin_cpu_is("nehalem")) - a("nehalem"); +void test_silvermont(void) { + if (__builtin_cpu_is("silvermont")) + a("silvermont"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK-LABEL: define{{.*}} void @test_silvermont( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 6 +} + +void test_knl(void) { + if (__builtin_cpu_is("knl")) + a("knl"); + + // CHECK-LABEL: define{{.*}} void @test_knl( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 7 +} + +void test_btver1(void) { + if (__builtin_cpu_is("btver1")) + a("btver1"); + + // CHECK-LABEL: define{{.*}} void @test_btver1( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 8 +} + +void test_btver2(void) { + if (__builtin_cpu_is("btver2")) + a("btver2"); + + // CHECK-LABEL: define{{.*}} void @test_btver2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 9 +} + +void test_amdfam17h(void) { + if (__builtin_cpu_is("amdfam17h")) + a("amdfam17h"); + + // CHECK-LABEL: define{{.*}} void @test_amdfam17h( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 10 +} + +void test_knm(void) { + if (__builtin_cpu_is("knm")) + a("knm"); + + // CHECK-LABEL: define{{.*}} void @test_knm( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 11 +} + +void test_goldmont(void) { + if (__builtin_cpu_is("goldmont")) + a("goldmont"); + + // CHECK-LABEL: define{{.*}} void @test_goldmont( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 12 +} + +void test_goldmont_plus(void) { + if (__builtin_cpu_is("goldmont-plus")) + a("goldmont-plus"); + + // CHECK-LABEL: define{{.*}} void @test_goldmont_plus( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 13 +} + +void test_tremont(void) { + if (__builtin_cpu_is("tremont")) + a("tremont"); + + // CHECK-LABEL: define{{.*}} void @test_tremont( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 14 +} + +void test_amdfam19h(void) { + if (__builtin_cpu_is("amdfam19h")) + a("amdfam19h"); + + // CHECK-LABEL: define{{.*}} void @test_amdfam19h( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 15 +} + +void test_zhaoxin_fam7h(void) { + if (__builtin_cpu_is("zhaoxin_fam7h")) + a("zhaoxin_fam7h"); + + // CHECK-LABEL: define{{.*}} void @test_zhaoxin_fam7h( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 16 +} + +void test_sierraforest(void) { + if (__builtin_cpu_is("sierraforest")) + a("sierraforest"); + + // CHECK-LABEL: define{{.*}} void @test_sierraforest( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 17 +} + +void test_grandridge(void) { + if (__builtin_cpu_is("grandridge")) + a("grandridge"); + + // CHECK-LABEL: define{{.*}} void @test_grandridge( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 18 +} + +void test_clearwaterforest(void) { + if (__builtin_cpu_is("clearwaterforest")) + a("clearwaterforest"); + + // CHECK-LABEL: define{{.*}} void @test_clearwaterforest( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 19 +} + +void test_amdfam1ah(void) { + if (__builtin_cpu_is("amdfam1ah")) + a("amdfam1ah"); + + // CHECK-LABEL: define{{.*}} void @test_amdfam1ah( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 20 +} + +void test_hygonfam18h(void) { + if (__builtin_cpu_is("hygonfam18h")) + a("hygonfam18h"); + + // CHECK-LABEL: define{{.*}} void @test_hygonfam18h( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 21 +} + +void test_atom(void) { + if (__builtin_cpu_is("atom")) + a("atom"); + + // CHECK-LABEL: define{{.*}} void @test_atom( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) // CHECK: = icmp eq i32 [[LOAD]], 1 } -void other(void) { - if (__builtin_cpu_is("other")) - a("other"); +void test_amdfam10(void) { + if (__builtin_cpu_is("amdfam10")) + a("amdfam10"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_model + // CHECK-LABEL: define{{.*}} void @test_amdfam10( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) // CHECK: = icmp eq i32 [[LOAD]], 4 } -// A type alias must map to the same ABI value as its canonical entry. -void slm(void) { +void test_amdfam15(void) { + if (__builtin_cpu_is("amdfam15")) + a("amdfam15"); + + // CHECK-LABEL: define{{.*}} void @test_amdfam15( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 5 +} + +void test_amdfam1a(void) { + if (__builtin_cpu_is("amdfam1a")) + a("amdfam1a"); + + // CHECK-LABEL: define{{.*}} void @test_amdfam1a( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK: = icmp eq i32 [[LOAD]], 20 +} + +void test_slm(void) { if (__builtin_cpu_is("slm")) a("slm"); + // CHECK-LABEL: define{{.*}} void @test_slm( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) // CHECK: = icmp eq i32 [[LOAD]], 6 } -void amdfam10(void) { - if (__builtin_cpu_is("amdfam10")) - a("amdfam10"); +// CPU subtypes (field offset 8). +void test_nehalem(void) { + if (__builtin_cpu_is("nehalem")) + a("nehalem"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 4) + // CHECK-LABEL: define{{.*}} void @test_nehalem( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 1 +} + +void test_westmere(void) { + if (__builtin_cpu_is("westmere")) + a("westmere"); + + // CHECK-LABEL: define{{.*}} void @test_westmere( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 2 +} + +void test_sandybridge(void) { + if (__builtin_cpu_is("sandybridge")) + a("sandybridge"); + + // CHECK-LABEL: define{{.*}} void @test_sandybridge( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 3 +} + +void test_barcelona(void) { + if (__builtin_cpu_is("barcelona")) + a("barcelona"); + + // CHECK-LABEL: define{{.*}} void @test_barcelona( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 4 } -// Subtype ABI values below have gaps reserved for Zhaoxin CPUs; they must -// match the values implemented in compiler-rt/libgcc exactly. -void znver5(void) { +void test_shanghai(void) { + if (__builtin_cpu_is("shanghai")) + a("shanghai"); + + // CHECK-LABEL: define{{.*}} void @test_shanghai( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 5 +} + +void test_istanbul(void) { + if (__builtin_cpu_is("istanbul")) + a("istanbul"); + + // CHECK-LABEL: define{{.*}} void @test_istanbul( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 6 +} + +void test_bdver1(void) { + if (__builtin_cpu_is("bdver1")) + a("bdver1"); + + // CHECK-LABEL: define{{.*}} void @test_bdver1( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 7 +} + +void test_bdver2(void) { + if (__builtin_cpu_is("bdver2")) + a("bdver2"); + + // CHECK-LABEL: define{{.*}} void @test_bdver2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 8 +} + +void test_bdver3(void) { + if (__builtin_cpu_is("bdver3")) + a("bdver3"); + + // CHECK-LABEL: define{{.*}} void @test_bdver3( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 9 +} + +void test_bdver4(void) { + if (__builtin_cpu_is("bdver4")) + a("bdver4"); + + // CHECK-LABEL: define{{.*}} void @test_bdver4( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 10 +} + +void test_znver1(void) { + if (__builtin_cpu_is("znver1")) + a("znver1"); + + // CHECK-LABEL: define{{.*}} void @test_znver1( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 11 +} + +void test_ivybridge(void) { + if (__builtin_cpu_is("ivybridge")) + a("ivybridge"); + + // CHECK-LABEL: define{{.*}} void @test_ivybridge( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 12 +} + +void test_haswell(void) { + if (__builtin_cpu_is("haswell")) + a("haswell"); + + // CHECK-LABEL: define{{.*}} void @test_haswell( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 13 +} + +void test_broadwell(void) { + if (__builtin_cpu_is("broadwell")) + a("broadwell"); + + // CHECK-LABEL: define{{.*}} void @test_broadwell( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 14 +} + +void test_skylake(void) { + if (__builtin_cpu_is("skylake")) + a("skylake"); + + // CHECK-LABEL: define{{.*}} void @test_skylake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 15 +} + +void test_skylake_avx512(void) { + if (__builtin_cpu_is("skylake-avx512")) + a("skylake-avx512"); + + // CHECK-LABEL: define{{.*}} void @test_skylake_avx512( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 16 +} + +void test_cannonlake(void) { + if (__builtin_cpu_is("cannonlake")) + a("cannonlake"); + + // CHECK-LABEL: define{{.*}} void @test_cannonlake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 17 +} + +void test_icelake_client(void) { + if (__builtin_cpu_is("icelake-client")) + a("icelake-client"); + + // CHECK-LABEL: define{{.*}} void @test_icelake_client( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 18 +} + +void test_icelake_server(void) { + if (__builtin_cpu_is("icelake-server")) + a("icelake-server"); + + // CHECK-LABEL: define{{.*}} void @test_icelake_server( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 19 +} + +void test_znver2(void) { + if (__builtin_cpu_is("znver2")) + a("znver2"); + + // CHECK-LABEL: define{{.*}} void @test_znver2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 20 +} + +void test_cascadelake(void) { + if (__builtin_cpu_is("cascadelake")) + a("cascadelake"); + + // CHECK-LABEL: define{{.*}} void @test_cascadelake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 21 +} + +void test_tigerlake(void) { + if (__builtin_cpu_is("tigerlake")) + a("tigerlake"); + + // CHECK-LABEL: define{{.*}} void @test_tigerlake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 22 +} + +void test_cooperlake(void) { + if (__builtin_cpu_is("cooperlake")) + a("cooperlake"); + + // CHECK-LABEL: define{{.*}} void @test_cooperlake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 23 +} + +void test_sapphirerapids(void) { + if (__builtin_cpu_is("sapphirerapids")) + a("sapphirerapids"); + + // CHECK-LABEL: define{{.*}} void @test_sapphirerapids( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 24 +} + +void test_alderlake(void) { + if (__builtin_cpu_is("alderlake")) + a("alderlake"); + + // CHECK-LABEL: define{{.*}} void @test_alderlake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 25 +} + +void test_znver3(void) { + if (__builtin_cpu_is("znver3")) + a("znver3"); + + // CHECK-LABEL: define{{.*}} void @test_znver3( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 26 +} + +void test_rocketlake(void) { + if (__builtin_cpu_is("rocketlake")) + a("rocketlake"); + + // CHECK-LABEL: define{{.*}} void @test_rocketlake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 27 +} + +void test_zhaoxin_fam7h_lujiazui(void) { + if (__builtin_cpu_is("zhaoxin_fam7h_lujiazui")) + a("zhaoxin_fam7h_lujiazui"); + + // CHECK-LABEL: define{{.*}} void @test_zhaoxin_fam7h_lujiazui( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 28 +} + +void test_znver4(void) { + if (__builtin_cpu_is("znver4")) + a("znver4"); + + // CHECK-LABEL: define{{.*}} void @test_znver4( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 29 +} + +void test_graniterapids(void) { + if (__builtin_cpu_is("graniterapids")) + a("graniterapids"); + + // CHECK-LABEL: define{{.*}} void @test_graniterapids( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 30 +} + +void test_graniterapids_d(void) { + if (__builtin_cpu_is("graniterapids-d")) + a("graniterapids-d"); + + // CHECK-LABEL: define{{.*}} void @test_graniterapids_d( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 31 +} + +void test_arrowlake(void) { + if (__builtin_cpu_is("arrowlake")) + a("arrowlake"); + + // CHECK-LABEL: define{{.*}} void @test_arrowlake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 32 +} + +void test_arrowlake_s(void) { + if (__builtin_cpu_is("arrowlake-s")) + a("arrowlake-s"); + + // CHECK-LABEL: define{{.*}} void @test_arrowlake_s( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 33 +} + +void test_pantherlake(void) { + if (__builtin_cpu_is("pantherlake")) + a("pantherlake"); + + // CHECK-LABEL: define{{.*}} void @test_pantherlake( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 34 +} + +void test_znver5(void) { if (__builtin_cpu_is("znver5")) a("znver5"); + // CHECK-LABEL: define{{.*}} void @test_znver5( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 36 } -void diamondrapids(void) { +void test_diamondrapids(void) { if (__builtin_cpu_is("diamondrapids")) a("diamondrapids"); + // CHECK-LABEL: define{{.*}} void @test_diamondrapids( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 38 } -void novalake(void) { +void test_novalake(void) { if (__builtin_cpu_is("novalake")) a("novalake"); + // CHECK-LABEL: define{{.*}} void @test_novalake( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 39 } -void znver6(void) { +void test_znver6(void) { if (__builtin_cpu_is("znver6")) a("znver6"); + // CHECK-LABEL: define{{.*}} void @test_znver6( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 40 } -void c86_4g_m4(void) { +void test_c86_4g_m4(void) { if (__builtin_cpu_is("c86-4g-m4")) a("c86-4g-m4"); + // CHECK-LABEL: define{{.*}} void @test_c86_4g_m4( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 41 } -void c86_4g_m8(void) { +void test_c86_4g_m6(void) { + if (__builtin_cpu_is("c86-4g-m6")) + a("c86-4g-m6"); + + // CHECK-LABEL: define{{.*}} void @test_c86_4g_m6( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 42 +} + +void test_c86_4g_m7(void) { + if (__builtin_cpu_is("c86-4g-m7")) + a("c86-4g-m7"); + + // CHECK-LABEL: define{{.*}} void @test_c86_4g_m7( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 43 +} + +void test_c86_4g_m8(void) { if (__builtin_cpu_is("c86-4g-m8")) a("c86-4g-m8"); + // CHECK-LABEL: define{{.*}} void @test_c86_4g_m8( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 44 } -// Subtype aliases must map to the same ABI value as their canonical entry. -void raptorlake(void) { +void test_raptorlake(void) { if (__builtin_cpu_is("raptorlake")) a("raptorlake"); + // CHECK-LABEL: define{{.*}} void @test_raptorlake( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 25 } -void meteorlake(void) { +void test_meteorlake(void) { if (__builtin_cpu_is("meteorlake")) a("meteorlake"); + // CHECK-LABEL: define{{.*}} void @test_meteorlake( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 25 } -void gracemont(void) { - if (__builtin_cpu_is("gracemont")) - a("gracemont"); - - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) - // CHECK: = icmp eq i32 [[LOAD]], 25 -} - -void emeraldrapids(void) { +void test_emeraldrapids(void) { if (__builtin_cpu_is("emeraldrapids")) a("emeraldrapids"); + // CHECK-LABEL: define{{.*}} void @test_emeraldrapids( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 24 } -void lunarlake(void) { +void test_lunarlake(void) { if (__builtin_cpu_is("lunarlake")) a("lunarlake"); + // CHECK-LABEL: define{{.*}} void @test_lunarlake( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 33 } -void wildcatlake(void) { +void test_gracemont(void) { + if (__builtin_cpu_is("gracemont")) + a("gracemont"); + + // CHECK-LABEL: define{{.*}} void @test_gracemont( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) + // CHECK: = icmp eq i32 [[LOAD]], 25 +} + +void test_wildcatlake(void) { if (__builtin_cpu_is("wildcatlake")) a("wildcatlake"); + // CHECK-LABEL: define{{.*}} void @test_wildcatlake( // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 8) // CHECK: = icmp eq i32 [[LOAD]], 34 } diff --git a/clang/test/CodeGen/builtin-cpu-supports-all.c b/clang/test/CodeGen/builtin-cpu-supports-all.c new file mode 100644 index 0000000000000..4429c207959d5 --- /dev/null +++ b/clang/test/CodeGen/builtin-cpu-supports-all.c @@ -0,0 +1,963 @@ +// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s | FileCheck %s + +// Test that __builtin_cpu_supports emits the correct field/bit for every +// feature listed in llvm/include/llvm/TargetParser/X86TargetParser.def. The +// ABI_VALUE is a bit index shared with compiler-rt/libgcc: bits 0-31 live in +// __cpu_model.__cpu_features (offset 12), bits >=32 in __cpu_features2[word-1]. +extern void a(const char *); + +// CHECK: @__cpu_model = external dso_local global { i32, i32, i32, [1 x i32] } + +void test_cmov(void) { + if (__builtin_cpu_supports("cmov")) + a("cmov"); + + // CHECK-LABEL: define{{.*}} void @test_cmov( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 1 +} + +void test_mmx(void) { + if (__builtin_cpu_supports("mmx")) + a("mmx"); + + // CHECK-LABEL: define{{.*}} void @test_mmx( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 2 +} + +void test_popcnt(void) { + if (__builtin_cpu_supports("popcnt")) + a("popcnt"); + + // CHECK-LABEL: define{{.*}} void @test_popcnt( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 4 +} + +void test_sse(void) { + if (__builtin_cpu_supports("sse")) + a("sse"); + + // CHECK-LABEL: define{{.*}} void @test_sse( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 8 +} + +void test_sse2(void) { + if (__builtin_cpu_supports("sse2")) + a("sse2"); + + // CHECK-LABEL: define{{.*}} void @test_sse2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 16 +} + +void test_sse3(void) { + if (__builtin_cpu_supports("sse3")) + a("sse3"); + + // CHECK-LABEL: define{{.*}} void @test_sse3( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 32 +} + +void test_ssse3(void) { + if (__builtin_cpu_supports("ssse3")) + a("ssse3"); + + // CHECK-LABEL: define{{.*}} void @test_ssse3( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 64 +} + +void test_sse4_1(void) { + if (__builtin_cpu_supports("sse4.1")) + a("sse4.1"); + + // CHECK-LABEL: define{{.*}} void @test_sse4_1( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 128 +} + +void test_sse4_2(void) { + if (__builtin_cpu_supports("sse4.2")) + a("sse4.2"); + + // CHECK-LABEL: define{{.*}} void @test_sse4_2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 256 +} + +void test_avx(void) { + if (__builtin_cpu_supports("avx")) + a("avx"); + + // CHECK-LABEL: define{{.*}} void @test_avx( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 512 +} + +void test_avx2(void) { + if (__builtin_cpu_supports("avx2")) + a("avx2"); + + // CHECK-LABEL: define{{.*}} void @test_avx2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 1024 +} + +void test_sse4a(void) { + if (__builtin_cpu_supports("sse4a")) + a("sse4a"); + + // CHECK-LABEL: define{{.*}} void @test_sse4a( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 2048 +} + +void test_fma4(void) { + if (__builtin_cpu_supports("fma4")) + a("fma4"); + + // CHECK-LABEL: define{{.*}} void @test_fma4( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 4096 +} + +void test_xop(void) { + if (__builtin_cpu_supports("xop")) + a("xop"); + + // CHECK-LABEL: define{{.*}} void @test_xop( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 8192 +} + +void test_fma(void) { + if (__builtin_cpu_supports("fma")) + a("fma"); + + // CHECK-LABEL: define{{.*}} void @test_fma( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 16384 +} + +void test_avx512f(void) { + if (__builtin_cpu_supports("avx512f")) + a("avx512f"); + + // CHECK-LABEL: define{{.*}} void @test_avx512f( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 32768 +} + +void test_bmi(void) { + if (__builtin_cpu_supports("bmi")) + a("bmi"); + + // CHECK-LABEL: define{{.*}} void @test_bmi( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 65536 +} + +void test_bmi2(void) { + if (__builtin_cpu_supports("bmi2")) + a("bmi2"); + + // CHECK-LABEL: define{{.*}} void @test_bmi2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 131072 +} + +void test_aes(void) { + if (__builtin_cpu_supports("aes")) + a("aes"); + + // CHECK-LABEL: define{{.*}} void @test_aes( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 262144 +} + +void test_pclmul(void) { + if (__builtin_cpu_supports("pclmul")) + a("pclmul"); + + // CHECK-LABEL: define{{.*}} void @test_pclmul( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 524288 +} + +void test_avx512vl(void) { + if (__builtin_cpu_supports("avx512vl")) + a("avx512vl"); + + // CHECK-LABEL: define{{.*}} void @test_avx512vl( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 1048576 +} + +void test_avx512bw(void) { + if (__builtin_cpu_supports("avx512bw")) + a("avx512bw"); + + // CHECK-LABEL: define{{.*}} void @test_avx512bw( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 2097152 +} + +void test_avx512dq(void) { + if (__builtin_cpu_supports("avx512dq")) + a("avx512dq"); + + // CHECK-LABEL: define{{.*}} void @test_avx512dq( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 4194304 +} + +void test_avx512cd(void) { + if (__builtin_cpu_supports("avx512cd")) + a("avx512cd"); + + // CHECK-LABEL: define{{.*}} void @test_avx512cd( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 8388608 +} + +void test_avx512vbmi(void) { + if (__builtin_cpu_supports("avx512vbmi")) + a("avx512vbmi"); + + // CHECK-LABEL: define{{.*}} void @test_avx512vbmi( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 67108864 +} + +void test_avx512ifma(void) { + if (__builtin_cpu_supports("avx512ifma")) + a("avx512ifma"); + + // CHECK-LABEL: define{{.*}} void @test_avx512ifma( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 134217728 +} + +void test_avx512vpopcntdq(void) { + if (__builtin_cpu_supports("avx512vpopcntdq")) + a("avx512vpopcntdq"); + + // CHECK-LABEL: define{{.*}} void @test_avx512vpopcntdq( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], 1073741824 +} + +void test_avx512vbmi2(void) { + if (__builtin_cpu_supports("avx512vbmi2")) + a("avx512vbmi2"); + + // CHECK-LABEL: define{{.*}} void @test_avx512vbmi2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_model, i64 12) + // CHECK: = and i32 [[LOAD]], -2147483648 +} + +void test_gfni(void) { + if (__builtin_cpu_supports("gfni")) + a("gfni"); + + // CHECK-LABEL: define{{.*}} void @test_gfni( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 1 +} + +void test_vpclmulqdq(void) { + if (__builtin_cpu_supports("vpclmulqdq")) + a("vpclmulqdq"); + + // CHECK-LABEL: define{{.*}} void @test_vpclmulqdq( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 2 +} + +void test_avx512vnni(void) { + if (__builtin_cpu_supports("avx512vnni")) + a("avx512vnni"); + + // CHECK-LABEL: define{{.*}} void @test_avx512vnni( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 4 +} + +void test_avx512bitalg(void) { + if (__builtin_cpu_supports("avx512bitalg")) + a("avx512bitalg"); + + // CHECK-LABEL: define{{.*}} void @test_avx512bitalg( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 8 +} + +void test_avx512bf16(void) { + if (__builtin_cpu_supports("avx512bf16")) + a("avx512bf16"); + + // CHECK-LABEL: define{{.*}} void @test_avx512bf16( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 16 +} + +void test_avx512vp2intersect(void) { + if (__builtin_cpu_supports("avx512vp2intersect")) + a("avx512vp2intersect"); + + // CHECK-LABEL: define{{.*}} void @test_avx512vp2intersect( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 32 +} + +void test_adx(void) { + if (__builtin_cpu_supports("adx")) + a("adx"); + + // CHECK-LABEL: define{{.*}} void @test_adx( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 256 +} + +void test_cldemote(void) { + if (__builtin_cpu_supports("cldemote")) + a("cldemote"); + + // CHECK-LABEL: define{{.*}} void @test_cldemote( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 1024 +} + +void test_clflushopt(void) { + if (__builtin_cpu_supports("clflushopt")) + a("clflushopt"); + + // CHECK-LABEL: define{{.*}} void @test_clflushopt( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 2048 +} + +void test_clwb(void) { + if (__builtin_cpu_supports("clwb")) + a("clwb"); + + // CHECK-LABEL: define{{.*}} void @test_clwb( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 4096 +} + +void test_clzero(void) { + if (__builtin_cpu_supports("clzero")) + a("clzero"); + + // CHECK-LABEL: define{{.*}} void @test_clzero( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 8192 +} + +void test_cx16(void) { + if (__builtin_cpu_supports("cx16")) + a("cx16"); + + // CHECK-LABEL: define{{.*}} void @test_cx16( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 16384 +} + +void test_enqcmd(void) { + if (__builtin_cpu_supports("enqcmd")) + a("enqcmd"); + + // CHECK-LABEL: define{{.*}} void @test_enqcmd( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 65536 +} + +void test_f16c(void) { + if (__builtin_cpu_supports("f16c")) + a("f16c"); + + // CHECK-LABEL: define{{.*}} void @test_f16c( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 131072 +} + +void test_fsgsbase(void) { + if (__builtin_cpu_supports("fsgsbase")) + a("fsgsbase"); + + // CHECK-LABEL: define{{.*}} void @test_fsgsbase( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 262144 +} + +void test_sahf(void) { + if (__builtin_cpu_supports("sahf")) + a("sahf"); + + // CHECK-LABEL: define{{.*}} void @test_sahf( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 4194304 +} + +void test_64bit(void) { + if (__builtin_cpu_supports("64bit")) + a("64bit"); + + // CHECK-LABEL: define{{.*}} void @test_64bit( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 8388608 +} + +void test_lwp(void) { + if (__builtin_cpu_supports("lwp")) + a("lwp"); + + // CHECK-LABEL: define{{.*}} void @test_lwp( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 16777216 +} + +void test_lzcnt(void) { + if (__builtin_cpu_supports("lzcnt")) + a("lzcnt"); + + // CHECK-LABEL: define{{.*}} void @test_lzcnt( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 33554432 +} + +void test_movbe(void) { + if (__builtin_cpu_supports("movbe")) + a("movbe"); + + // CHECK-LABEL: define{{.*}} void @test_movbe( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 67108864 +} + +void test_movdir64b(void) { + if (__builtin_cpu_supports("movdir64b")) + a("movdir64b"); + + // CHECK-LABEL: define{{.*}} void @test_movdir64b( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 134217728 +} + +void test_movdiri(void) { + if (__builtin_cpu_supports("movdiri")) + a("movdiri"); + + // CHECK-LABEL: define{{.*}} void @test_movdiri( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 268435456 +} + +void test_mwaitx(void) { + if (__builtin_cpu_supports("mwaitx")) + a("mwaitx"); + + // CHECK-LABEL: define{{.*}} void @test_mwaitx( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], 536870912 +} + +void test_pconfig(void) { + if (__builtin_cpu_supports("pconfig")) + a("pconfig"); + + // CHECK-LABEL: define{{.*}} void @test_pconfig( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK: = and i32 [[LOAD]], -2147483648 +} + +void test_pku(void) { + if (__builtin_cpu_supports("pku")) + a("pku"); + + // CHECK-LABEL: define{{.*}} void @test_pku( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 1 +} + +void test_prfchw(void) { + if (__builtin_cpu_supports("prfchw")) + a("prfchw"); + + // CHECK-LABEL: define{{.*}} void @test_prfchw( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 4 +} + +void test_ptwrite(void) { + if (__builtin_cpu_supports("ptwrite")) + a("ptwrite"); + + // CHECK-LABEL: define{{.*}} void @test_ptwrite( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 8 +} + +void test_rdpid(void) { + if (__builtin_cpu_supports("rdpid")) + a("rdpid"); + + // CHECK-LABEL: define{{.*}} void @test_rdpid( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 16 +} + +void test_rdrnd(void) { + if (__builtin_cpu_supports("rdrnd")) + a("rdrnd"); + + // CHECK-LABEL: define{{.*}} void @test_rdrnd( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 32 +} + +void test_rdseed(void) { + if (__builtin_cpu_supports("rdseed")) + a("rdseed"); + + // CHECK-LABEL: define{{.*}} void @test_rdseed( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 64 +} + +void test_rtm(void) { + if (__builtin_cpu_supports("rtm")) + a("rtm"); + + // CHECK-LABEL: define{{.*}} void @test_rtm( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 128 +} + +void test_serialize(void) { + if (__builtin_cpu_supports("serialize")) + a("serialize"); + + // CHECK-LABEL: define{{.*}} void @test_serialize( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 256 +} + +void test_sgx(void) { + if (__builtin_cpu_supports("sgx")) + a("sgx"); + + // CHECK-LABEL: define{{.*}} void @test_sgx( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 512 +} + +void test_sha(void) { + if (__builtin_cpu_supports("sha")) + a("sha"); + + // CHECK-LABEL: define{{.*}} void @test_sha( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 1024 +} + +void test_shstk(void) { + if (__builtin_cpu_supports("shstk")) + a("shstk"); + + // CHECK-LABEL: define{{.*}} void @test_shstk( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 2048 +} + +void test_tbm(void) { + if (__builtin_cpu_supports("tbm")) + a("tbm"); + + // CHECK-LABEL: define{{.*}} void @test_tbm( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 4096 +} + +void test_tsxldtrk(void) { + if (__builtin_cpu_supports("tsxldtrk")) + a("tsxldtrk"); + + // CHECK-LABEL: define{{.*}} void @test_tsxldtrk( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 8192 +} + +void test_vaes(void) { + if (__builtin_cpu_supports("vaes")) + a("vaes"); + + // CHECK-LABEL: define{{.*}} void @test_vaes( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 16384 +} + +void test_waitpkg(void) { + if (__builtin_cpu_supports("waitpkg")) + a("waitpkg"); + + // CHECK-LABEL: define{{.*}} void @test_waitpkg( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 32768 +} + +void test_wbnoinvd(void) { + if (__builtin_cpu_supports("wbnoinvd")) + a("wbnoinvd"); + + // CHECK-LABEL: define{{.*}} void @test_wbnoinvd( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 65536 +} + +void test_xsave(void) { + if (__builtin_cpu_supports("xsave")) + a("xsave"); + + // CHECK-LABEL: define{{.*}} void @test_xsave( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 131072 +} + +void test_xsavec(void) { + if (__builtin_cpu_supports("xsavec")) + a("xsavec"); + + // CHECK-LABEL: define{{.*}} void @test_xsavec( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 262144 +} + +void test_xsaveopt(void) { + if (__builtin_cpu_supports("xsaveopt")) + a("xsaveopt"); + + // CHECK-LABEL: define{{.*}} void @test_xsaveopt( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 524288 +} + +void test_xsaves(void) { + if (__builtin_cpu_supports("xsaves")) + a("xsaves"); + + // CHECK-LABEL: define{{.*}} void @test_xsaves( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 1048576 +} + +void test_amx_tile(void) { + if (__builtin_cpu_supports("amx-tile")) + a("amx-tile"); + + // CHECK-LABEL: define{{.*}} void @test_amx_tile( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 2097152 +} + +void test_amx_int8(void) { + if (__builtin_cpu_supports("amx-int8")) + a("amx-int8"); + + // CHECK-LABEL: define{{.*}} void @test_amx_int8( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 4194304 +} + +void test_amx_bf16(void) { + if (__builtin_cpu_supports("amx-bf16")) + a("amx-bf16"); + + // CHECK-LABEL: define{{.*}} void @test_amx_bf16( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 8388608 +} + +void test_uintr(void) { + if (__builtin_cpu_supports("uintr")) + a("uintr"); + + // CHECK-LABEL: define{{.*}} void @test_uintr( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 16777216 +} + +void test_hreset(void) { + if (__builtin_cpu_supports("hreset")) + a("hreset"); + + // CHECK-LABEL: define{{.*}} void @test_hreset( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 33554432 +} + +void test_kl(void) { + if (__builtin_cpu_supports("kl")) + a("kl"); + + // CHECK-LABEL: define{{.*}} void @test_kl( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 67108864 +} + +void test_widekl(void) { + if (__builtin_cpu_supports("widekl")) + a("widekl"); + + // CHECK-LABEL: define{{.*}} void @test_widekl( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 268435456 +} + +void test_avxvnni(void) { + if (__builtin_cpu_supports("avxvnni")) + a("avxvnni"); + + // CHECK-LABEL: define{{.*}} void @test_avxvnni( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 536870912 +} + +void test_avx512fp16(void) { + if (__builtin_cpu_supports("avx512fp16")) + a("avx512fp16"); + + // CHECK-LABEL: define{{.*}} void @test_avx512fp16( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], 1073741824 +} + +void test_avxifma(void) { + if (__builtin_cpu_supports("avxifma")) + a("avxifma"); + + // CHECK-LABEL: define{{.*}} void @test_avxifma( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 8 +} + +void test_avxvnniint8(void) { + if (__builtin_cpu_supports("avxvnniint8")) + a("avxvnniint8"); + + // CHECK-LABEL: define{{.*}} void @test_avxvnniint8( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 16 +} + +void test_avxneconvert(void) { + if (__builtin_cpu_supports("avxneconvert")) + a("avxneconvert"); + + // CHECK-LABEL: define{{.*}} void @test_avxneconvert( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 32 +} + +void test_cmpccxadd(void) { + if (__builtin_cpu_supports("cmpccxadd")) + a("cmpccxadd"); + + // CHECK-LABEL: define{{.*}} void @test_cmpccxadd( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 64 +} + +void test_amx_fp16(void) { + if (__builtin_cpu_supports("amx-fp16")) + a("amx-fp16"); + + // CHECK-LABEL: define{{.*}} void @test_amx_fp16( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 128 +} + +void test_prefetchi(void) { + if (__builtin_cpu_supports("prefetchi")) + a("prefetchi"); + + // CHECK-LABEL: define{{.*}} void @test_prefetchi( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 256 +} + +void test_raoint(void) { + if (__builtin_cpu_supports("raoint")) + a("raoint"); + + // CHECK-LABEL: define{{.*}} void @test_raoint( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 512 +} + +void test_amx_complex(void) { + if (__builtin_cpu_supports("amx-complex")) + a("amx-complex"); + + // CHECK-LABEL: define{{.*}} void @test_amx_complex( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 1024 +} + +void test_avxvnniint16(void) { + if (__builtin_cpu_supports("avxvnniint16")) + a("avxvnniint16"); + + // CHECK-LABEL: define{{.*}} void @test_avxvnniint16( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 2048 +} + +void test_sm3(void) { + if (__builtin_cpu_supports("sm3")) + a("sm3"); + + // CHECK-LABEL: define{{.*}} void @test_sm3( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 4096 +} + +void test_sha512(void) { + if (__builtin_cpu_supports("sha512")) + a("sha512"); + + // CHECK-LABEL: define{{.*}} void @test_sha512( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 8192 +} + +void test_sm4(void) { + if (__builtin_cpu_supports("sm4")) + a("sm4"); + + // CHECK-LABEL: define{{.*}} void @test_sm4( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 16384 +} + +void test_apxf(void) { + if (__builtin_cpu_supports("apxf")) + a("apxf"); + + // CHECK-LABEL: define{{.*}} void @test_apxf( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 32768 +} + +void test_usermsr(void) { + if (__builtin_cpu_supports("usermsr")) + a("usermsr"); + + // CHECK-LABEL: define{{.*}} void @test_usermsr( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 65536 +} + +void test_avx10_1(void) { + if (__builtin_cpu_supports("avx10.1")) + a("avx10.1"); + + // CHECK-LABEL: define{{.*}} void @test_avx10_1( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 262144 +} + +void test_avx10_2(void) { + if (__builtin_cpu_supports("avx10.2")) + a("avx10.2"); + + // CHECK-LABEL: define{{.*}} void @test_avx10_2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 1048576 +} + +void test_amx_avx512(void) { + if (__builtin_cpu_supports("amx-avx512")) + a("amx-avx512"); + + // CHECK-LABEL: define{{.*}} void @test_amx_avx512( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 2097152 +} + +void test_amx_tf32(void) { + if (__builtin_cpu_supports("amx-tf32")) + a("amx-tf32"); + + // CHECK-LABEL: define{{.*}} void @test_amx_tf32( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 4194304 +} + +void test_amx_fp8(void) { + if (__builtin_cpu_supports("amx-fp8")) + a("amx-fp8"); + + // CHECK-LABEL: define{{.*}} void @test_amx_fp8( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 16777216 +} + +void test_movrs(void) { + if (__builtin_cpu_supports("movrs")) + a("movrs"); + + // CHECK-LABEL: define{{.*}} void @test_movrs( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 33554432 +} + +void test_amx_movrs(void) { + if (__builtin_cpu_supports("amx-movrs")) + a("amx-movrs"); + + // CHECK-LABEL: define{{.*}} void @test_amx_movrs( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 67108864 +} + +void test_x86_64(void) { + if (__builtin_cpu_supports("x86-64")) + a("x86-64"); + + // CHECK-LABEL: define{{.*}} void @test_x86_64( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 4) + // CHECK: = and i32 [[LOAD]], -2147483648 +} + +void test_x86_64_v2(void) { + if (__builtin_cpu_supports("x86-64-v2")) + a("x86-64-v2"); + + // CHECK-LABEL: define{{.*}} void @test_x86_64_v2( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 1 +} + +void test_x86_64_v3(void) { + if (__builtin_cpu_supports("x86-64-v3")) + a("x86-64-v3"); + + // CHECK-LABEL: define{{.*}} void @test_x86_64_v3( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 2 +} + +void test_x86_64_v4(void) { + if (__builtin_cpu_supports("x86-64-v4")) + a("x86-64-v4"); + + // CHECK-LABEL: define{{.*}} void @test_x86_64_v4( + // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) + // CHECK: = and i32 [[LOAD]], 4 +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
