Author: Finn Plummer
Date: 2026-08-11T09:45:50-07:00
New Revision: f9d6bef0efd7645ce761f794f6fcbb7f88ad2ad9

URL: 
https://github.com/llvm/llvm-project/commit/f9d6bef0efd7645ce761f794f6fcbb7f88ad2ad9
DIFF: 
https://github.com/llvm/llvm-project/commit/f9d6bef0efd7645ce761f794f6fcbb7f88ad2ad9.diff

LOG: [HLSL][DirectX] Correct codegen of `dx.load.input`/`dx.store.output` 
intrinsic calls (#212656)

This pr updates the placeholder calls with their correctly computed
operands. It also removes unused operands from the intrinsic.

Note: this doesn't account for a matrix type as the leaf type as this is
blocked on a resolution to
https://github.com/llvm/llvm-project/issues/211977. This is tracked
separately.

Each call will be emit per register row, it is then the job of the
scalarizer to ensure the element relative column is updated correctly.
This means that this col will always be assigned 0 at codegen time.

Resolves #204876

Assisted by: Claude Opus 4.8 and GPT 5.6 Sol

Added: 
    clang/test/CodeGenHLSL/semantics/semantic.bool.hlsl
    clang/test/CodeGenHLSL/semantics/semantic.input.hlsl
    clang/test/CodeGenHLSL/semantics/semantic.output.hlsl

Modified: 
    clang/lib/CodeGen/CGHLSLRuntime.cpp
    clang/lib/CodeGen/CGHLSLRuntime.h
    clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
    clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
    clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
    clang/test/CodeGenHLSL/semantics/SV_VertexID.vs.hlsl
    clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
    clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
    clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
    
clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
    clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
    clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
    clang/test/CodeGenHLSL/sret_output.hlsl
    llvm/include/llvm/IR/IntrinsicsDirectX.td
    llvm/lib/Target/DirectX/DXIL.td
    llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
    llvm/test/CodeGen/DirectX/LoadInput.ll
    llvm/test/CodeGen/DirectX/StoreOutput.ll

Removed: 
    


################################################################################
diff  --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp 
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index a24e63f0b2b93..814894ea14da7 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -50,6 +50,7 @@
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Transforms/Utils/ModuleUtils.h"
+#include <array>
 #include <cstdint>
 #include <optional>
 
@@ -1186,21 +1187,76 @@ void CGHLSLRuntime::emitSPIRVUserSemanticStore(
                            VariableName.str());
 }
 
-llvm::Value *
-CGHLSLRuntime::emitDXILUserSemanticLoad(llvm::IRBuilder<> &B, llvm::Type *Type,
-                                        HLSLAppliedSemanticAttr *Semantic,
-                                        std::optional<unsigned> Index) {
-  Twine BaseName = Twine(Semantic->getAttrName()->getName());
-  Twine VariableName = BaseName.concat(Twine(Index.value_or(0)));
+namespace {
+// Describes how a semantic leaf lowers to signature rows
+struct SemanticShape {
+  SmallVector<unsigned> Dimensions; // Empty dims denotes a scalar
+  unsigned Cols;
+  QualType RowType;
+
+  unsigned getNumRows() const {
+    unsigned Rows = 1;
+    for (unsigned Dimension : Dimensions)
+      Rows *= Dimension;
+    return Rows;
+  }
+
+  SmallVector<unsigned> getArrayIndicesForRow(unsigned Row) const {
+    assert(Row < getNumRows() && "row exceeds semantic shape");
+
+    SmallVector<unsigned> Indices(Dimensions.size());
+    for (auto [Index, Dimension] :
+         llvm::zip_equal(llvm::reverse(Indices), llvm::reverse(Dimensions))) {
+      Index = Row % Dimension;
+      Row /= Dimension;
+    }
+    return Indices;
+  }
+};
+} // namespace
+
+// Returns the QualType of a semantic leaf declarator. For a function the
+// declared return type is used, otherwise the declared type.
+static QualType getSemanticLeafType(const clang::DeclaratorDecl *Decl) {
+  if (const auto *FD = dyn_cast<clang::FunctionDecl>(Decl))
+    return FD->getDeclaredReturnType();
+  return Decl->getType();
+}
+
+// Walks through the surrounding constant array types of \p Ty, collecting 
their
+// dimensions until reaching a scalar, vector, or matrix leaf.
+static SemanticShape getSemanticShape(ASTContext &Ctx, QualType Ty) {
+  SemanticShape Shape{{}, 1, Ty};
+  while (const ConstantArrayType *CAT =
+             Ctx.getAsConstantArrayType(Shape.RowType)) {
+    Shape.Dimensions.push_back(CAT->getSize().getZExtValue());
+    Shape.RowType = CAT->getElementType();
+  }
+
+  if (const auto *VT = Shape.RowType->getAs<clang::VectorType>()) {
+    Shape.Cols = VT->getNumElements();
+  } else if (const auto *MT =
+                 Shape.RowType->getAs<clang::ConstantMatrixType>()) {
+    // FIXME: a matrix leaf lowers to one row per matrix row but if 
column_major
+    // is specified we transpose the num rows and num cols, this depends on
+    // #211977 to resolve
+    Shape.Cols = MT->getNumColumns();
+  }
+
+  return Shape;
+}
 
-  // DXIL packing rules etc shall be handled here.
-  // FIXME: generate proper sigpoint, index, col, row values.
-  // FIXME: also DXIL loads vectors element by element.
-  SmallVector<Value *> Args{B.getInt32(4), B.getInt32(0), B.getInt32(0),
-                            B.getInt8(0),
-                            llvm::PoisonValue::get(B.getInt32Ty())};
+llvm::Value *CGHLSLRuntime::emitDXILUserSemanticLoad(
+    llvm::IRBuilder<> &B, llvm::Type *Type, const clang::DeclaratorDecl *Decl,
+    HLSLAppliedSemanticAttr *Semantic, std::optional<unsigned> Index) {
+  StringRef Name = Semantic->getAttrName()->getName();
+  SemanticShape Shape =
+      getSemanticShape(CGM.getContext(), getSemanticLeafType(Decl));
 
-  llvm::Intrinsic::ID IntrinsicID = llvm::Intrinsic::dx_load_input;
+  llvm::Type *RowTy = CGM.getTypes().ConvertTypeForMem(Shape.RowType);
+
+  llvm::Function *IntrFn = llvm::Intrinsic::getOrInsertDeclaration(
+      B.GetInsertBlock()->getModule(), llvm::Intrinsic::dx_load_input, 
{RowTy});
 
   SmallVector<OperandBundleDef, 1> OB;
   if (auto *Token = getConvergenceToken(*B.GetInsertBlock())) {
@@ -1208,22 +1264,49 @@ 
CGHLSLRuntime::emitDXILUserSemanticLoad(llvm::IRBuilder<> &B, llvm::Type *Type,
     OB.emplace_back("convergencectrl", bundleArgs);
   }
 
-  llvm::Function *IntrFn = llvm::Intrinsic::getOrInsertDeclaration(
-      B.GetInsertBlock()->getModule(), IntrinsicID, {Type});
-  llvm::Value *Value = B.CreateCall(IntrFn, Args, OB, VariableName);
-  return Value;
+  unsigned SigId = DXILInputSemanticIndex++;
+
+  llvm::Type *LeafTy = CGM.getTypes().ConvertType(Shape.RowType);
+  llvm::Value *Result = llvm::PoisonValue::get(Type);
+
+  const unsigned NumRows = Shape.getNumRows();
+
+  for (unsigned Row = 0; Row < NumRows; ++Row) {
+    SmallVector<unsigned> Indices = Shape.getArrayIndicesForRow(Row);
+    std::array<Value *, 4> Args{
+        /*SigElementId=*/B.getInt32(SigId),
+        /*RowIndex=*/B.getInt32(Row),
+        /*ColIndex=*/B.getInt8(0),
+        /*GsVertexOrPrimIndex=*/llvm::PoisonValue::get(B.getInt32Ty())};
+    llvm::Value *Value =
+        B.CreateCall(IntrFn, Args, OB, Twine(Name).concat(Twine(Row)));
+    // Booleans use their memory representation in DXIL signatures, but
+    // function parameters use their value representation.
+    if (Value->getType() != LeafTy) {
+      assert(Shape.RowType->hasBooleanRepresentation() &&
+             "unexpected semantic load type mismatch");
+      Value = B.CreateICmpNE(
+          Value, llvm::Constant::getNullValue(Value->getType()), "loadedv");
+    }
+
+    Result =
+        Indices.empty() ? Value : B.CreateInsertValue(Result, Value, Indices);
+  }
+  return Result;
 }
 
 void CGHLSLRuntime::emitDXILUserSemanticStore(llvm::IRBuilder<> &B,
                                               llvm::Value *Source,
+                                              const clang::DeclaratorDecl 
*Decl,
                                               HLSLAppliedSemanticAttr 
*Semantic,
                                               std::optional<unsigned> Index) {
-  // DXIL packing rules etc shall be handled here.
-  // FIXME: generate proper sigpoint, index, col, row values.
-  SmallVector<Value *> Args{B.getInt32(4), B.getInt32(0), B.getInt32(0),
-                            B.getInt8(0), Source};
+  SemanticShape Shape =
+      getSemanticShape(CGM.getContext(), getSemanticLeafType(Decl));
+  llvm::Type *RowTy = CGM.getTypes().ConvertTypeForMem(Shape.RowType);
 
-  llvm::Intrinsic::ID IntrinsicID = llvm::Intrinsic::dx_store_output;
+  llvm::Function *IntrFn = llvm::Intrinsic::getOrInsertDeclaration(
+      B.GetInsertBlock()->getModule(), llvm::Intrinsic::dx_store_output,
+      {RowTy});
 
   SmallVector<OperandBundleDef, 1> OB;
   if (auto *Token = getConvergenceToken(*B.GetInsertBlock())) {
@@ -1231,9 +1314,27 @@ void 
CGHLSLRuntime::emitDXILUserSemanticStore(llvm::IRBuilder<> &B,
     OB.emplace_back("convergencectrl", bundleArgs);
   }
 
-  llvm::Function *IntrFn = llvm::Intrinsic::getOrInsertDeclaration(
-      B.GetInsertBlock()->getModule(), IntrinsicID, {Source->getType()});
-  B.CreateCall(IntrFn, Args, OB);
+  unsigned SigId = DXILOutputSemanticIndex++;
+
+  const unsigned NumRows = Shape.getNumRows();
+  for (unsigned Row = 0; Row < NumRows; ++Row) {
+    SmallVector<unsigned> Indices = Shape.getArrayIndicesForRow(Row);
+    llvm::Value *Val =
+        Indices.empty() ? Source : B.CreateExtractValue(Source, Indices);
+
+    // Booleans use their memory representation in DXIL signatures, but direct
+    // function results use their value representation.
+    if (Val->getType() != RowTy) {
+      assert(Shape.RowType->hasBooleanRepresentation() &&
+             "unexpected semantic store type mismatch");
+      Val = B.CreateZExt(Val, RowTy, "storedv");
+    }
+
+    std::array<Value *, 4> Args{/*SigElementId=*/B.getInt32(SigId),
+                                /*RowIndex=*/B.getInt32(Row),
+                                /*ColIndex=*/B.getInt8(0), /*Value=*/Val};
+    B.CreateCall(IntrFn, Args, OB);
+  }
 }
 
 llvm::Value *CGHLSLRuntime::emitUserSemanticLoad(
@@ -1244,7 +1345,7 @@ llvm::Value *CGHLSLRuntime::emitUserSemanticLoad(
     return emitSPIRVUserSemanticLoad(B, FD, Type, Decl, Semantic, Index);
 
   if (CGM.getTarget().getTriple().isDXIL())
-    return emitDXILUserSemanticLoad(B, Type, Semantic, Index);
+    return emitDXILUserSemanticLoad(B, Type, Decl, Semantic, Index);
 
   llvm_unreachable("Unsupported target for user-semantic load.");
 }
@@ -1257,7 +1358,7 @@ void CGHLSLRuntime::emitUserSemanticStore(IRBuilder<> &B, 
llvm::Value *Source,
     return emitSPIRVUserSemanticStore(B, Source, Decl, Semantic, Index);
 
   if (CGM.getTarget().getTriple().isDXIL())
-    return emitDXILUserSemanticStore(B, Source, Semantic, Index);
+    return emitDXILUserSemanticStore(B, Source, Decl, Semantic, Index);
 
   llvm_unreachable("Unsupported target for user-semantic load.");
 }
@@ -1312,7 +1413,7 @@ llvm::Value *CGHLSLRuntime::emitSystemSemanticLoad(
                                       Semantic->getAttrName()->getName(),
                                       /* BuiltIn::FragCoord */ 15);
       if (CGM.getTarget().getTriple().isDXIL())
-        return emitDXILUserSemanticLoad(B, Type, Semantic, Index);
+        return emitDXILUserSemanticLoad(B, Type, Decl, Semantic, Index);
     }
 
     if (ST == Triple::EnvironmentType::Vertex) {
@@ -1327,7 +1428,7 @@ llvm::Value *CGHLSLRuntime::emitSystemSemanticLoad(
                                       Semantic->getAttrName()->getName(),
                                       /* BuiltIn::VertexIndex */ 42);
       else
-        return emitDXILUserSemanticLoad(B, Type, Semantic, Index);
+        return emitDXILUserSemanticLoad(B, Type, Decl, Semantic, Index);
     }
   }
 
@@ -1357,7 +1458,7 @@ void CGHLSLRuntime::emitSystemSemanticStore(IRBuilder<> 
&B, llvm::Value *Source,
   std::string SemanticName = Semantic->getAttrName()->getName().upper();
   if (SemanticName == "SV_POSITION") {
     if (CGM.getTarget().getTriple().isDXIL()) {
-      emitDXILUserSemanticStore(B, Source, Semantic, Index);
+      emitDXILUserSemanticStore(B, Source, Decl, Semantic, Index);
       return;
     }
 
@@ -1485,6 +1586,9 @@ CGHLSLRuntime::handleSemanticStore(
 
 void CGHLSLRuntime::emitEntryFunction(const FunctionDecl *FD,
                                       llvm::Function *Fn) {
+  DXILInputSemanticIndex = 0;
+  DXILOutputSemanticIndex = 0;
+
   llvm::Module &M = CGM.getModule();
   llvm::LLVMContext &Ctx = M.getContext();
   auto *EntryTy = llvm::FunctionType::get(llvm::Type::getVoidTy(Ctx), false);

diff  --git a/clang/lib/CodeGen/CGHLSLRuntime.h 
b/clang/lib/CodeGen/CGHLSLRuntime.h
index 263d6faa8255c..f5674b64d0041 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.h
+++ b/clang/lib/CodeGen/CGHLSLRuntime.h
@@ -338,6 +338,7 @@ class CGHLSLRuntime {
                                          HLSLAppliedSemanticAttr *Semantic,
                                          std::optional<unsigned> Index);
   llvm::Value *emitDXILUserSemanticLoad(llvm::IRBuilder<> &B, llvm::Type *Type,
+                                        const clang::DeclaratorDecl *Decl,
                                         HLSLAppliedSemanticAttr *Semantic,
                                         std::optional<unsigned> Index);
   llvm::Value *emitUserSemanticLoad(llvm::IRBuilder<> &B,
@@ -351,6 +352,7 @@ class CGHLSLRuntime {
                                   HLSLAppliedSemanticAttr *Semantic,
                                   std::optional<unsigned> Index);
   void emitDXILUserSemanticStore(llvm::IRBuilder<> &B, llvm::Value *Source,
+                                 const clang::DeclaratorDecl *Decl,
                                  HLSLAppliedSemanticAttr *Semantic,
                                  std::optional<unsigned> Index);
   void emitUserSemanticStore(llvm::IRBuilder<> &B, llvm::Value *Source,
@@ -367,6 +369,12 @@ class CGHLSLRuntime {
   llvm::DenseMap<const clang::RecordType *, llvm::StructType *> LayoutTypes;
   unsigned SPIRVLastAssignedInputSemanticLocation = 0;
   unsigned SPIRVLastAssignedOutputSemanticLocation = 0;
+
+  // FIXME: #57928, storing these here and reseting them in the entry is not
+  // very nice and is a temporary until we accumulate the signatures as part of
+  // the mentioned issue.
+  unsigned DXILInputSemanticIndex = 0;
+  unsigned DXILOutputSemanticIndex = 0;
 };
 
 } // namespace CodeGen

diff  --git a/clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl 
b/clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
index 0dbf307074e89..095532863ac5a 100644
--- a/clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
@@ -5,13 +5,13 @@
 
 // CHECK: define void @main() {{.*}} {
 float4 main(float4 p : SV_Position) : A {
-  // CHECK-SPIRV: %[[#P:]] = load <4 x float>, ptr addrspace(7) @SV_Position, 
align 4
-  // CHECK-SPIRV: %[[#R:]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 x 
float> %[[#P]])
-  // CHECK-SPIRV:            store <4 x float> %[[#R]], ptr addrspace(8) @A0, 
align 4
+  // CHECK-SPIRV: %[[P:.*]] = load <4 x float>, ptr addrspace(7) @SV_Position, 
align 4
+  // CHECK-SPIRV: %[[R:.*]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 x 
float> %[[P]])
+  // CHECK-SPIRV:            store <4 x float> %[[R]], ptr addrspace(8) @A0, 
align 4
 
-  // CHECK-DXIL: %SV_Position0 = call <4 x float> 
@llvm.dx.load.input.v4f32(i32 4, i32 0, i32 0, i8 0, i32 poison)
-  // CHECK-DXIL:    %[[#TMP:]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%SV_Position0)
-  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 4, 
i32 0, i32 0, i8 0, <4 x float> %[[#TMP]])
+  // CHECK-DXIL: %[[INPUT:.*]] = call <4 x float> 
@llvm.dx.load.input.v4f32(i32 0, i32 0, i8 0, i32 poison)
+  // CHECK-DXIL: %[[RESULT:.*]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%[[INPUT]])
+  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 0, 
i32 0, i8 0, <4 x float> %[[RESULT]])
   return p;
 }
 

diff  --git a/clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl 
b/clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
index aee4ee183bf9d..c227e8198c964 100644
--- a/clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
@@ -6,13 +6,13 @@
 
 // CHECK: define void @main() {{.*}} {
 float4 main(float4 p : SV_Position) : SV_Position {
-  // CHECK-SPIRV: %[[#P:]] = load <4 x float>, ptr addrspace(7) @SV_Position0, 
align 4
-  // CHECK-SPIRV: %[[#R:]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 x 
float> %[[#P]])
-  // CHECK-SPIRV:            store <4 x float> %[[#R]], ptr addrspace(8) 
@SV_Position, align 4
+  // CHECK-SPIRV: %[[P:.*]] = load <4 x float>, ptr addrspace(7) 
@SV_Position0, align 4
+  // CHECK-SPIRV: %[[R:.*]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 x 
float> %[[P]])
+  // CHECK-SPIRV:            store <4 x float> %[[R]], ptr addrspace(8) 
@SV_Position, align 4
 
-  // CHECK-DXIL: %SV_Position0 = call <4 x float> 
@llvm.dx.load.input.v4f32(i32 4, i32 0, i32 0, i8 0, i32 poison)
-  // CHECK-DXIL:    %[[#TMP:]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%SV_Position0)
-  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 4, 
i32 0, i32 0, i8 0, <4 x float> %[[#TMP]])
+  // CHECK-DXIL: %[[INPUT:.*]] = call <4 x float> 
@llvm.dx.load.input.v4f32(i32 0, i32 0, i8 0, i32 poison)
+  // CHECK-DXIL: %[[RESULT:.*]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%[[INPUT]])
+  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 0, 
i32 0, i8 0, <4 x float> %[[RESULT]])
   return p;
 }
 

diff  --git a/clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl 
b/clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
index 2c7929a9e821d..ae216d821750c 100644
--- a/clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
@@ -5,11 +5,12 @@
 
 // CHECK: define void @main() {{.*}} {
 float4 main(float4 p : SV_Position) : SV_Target {
-  // CHECK-SPIRV: %[[#R:]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 x 
float> %[[#]])
-  // CHECK-SPIRV:            store <4 x float> %[[#R]], ptr addrspace(8) 
@SV_Target0, align 4
+  // CHECK-SPIRV: %[[RESULT:.*]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 
x float> %{{.*}})
+  // CHECK-SPIRV:                 store <4 x float> %[[RESULT]], ptr 
addrspace(8) @SV_Target0, align 4
 
-  // CHECK-DXIL:    %[[#TMP:]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%SV_Position0)
-  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 4, 
i32 0, i32 0, i8 0, <4 x float> %[[#TMP]])
+  // CHECK-DXIL: %[[INPUT:.*]] = call <4 x float> 
@llvm.dx.load.input.v4f32(i32 0, i32 0, i8 0, i32 poison)
+  // CHECK-DXIL: %[[RESULT:.*]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%[[INPUT]])
+  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 0, 
i32 0, i8 0, <4 x float> %[[RESULT]])
   return p;
 }
 

diff  --git a/clang/test/CodeGenHLSL/semantics/SV_VertexID.vs.hlsl 
b/clang/test/CodeGenHLSL/semantics/SV_VertexID.vs.hlsl
index e2c184ac7948c..c965432b923db 100644
--- a/clang/test/CodeGenHLSL/semantics/SV_VertexID.vs.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/SV_VertexID.vs.hlsl
@@ -5,11 +5,11 @@
 
 // CHECK: define void @main() {{.*}} {
 uint main(uint id : SV_VertexID) : A {
-  // CHECK-SPIRV: %[[#P:]] = load i32, ptr addrspace(7) @SV_VertexID, align 4
-  // CHECK-SPIRV:   %[[#]] = call spir_func i32 @_Z4mainj(i32 %[[#P]])
+  // CHECK-SPIRV: %[[INPUT:.*]] = load i32, ptr addrspace(7) @SV_VertexID, 
align 4
+  // CHECK-SPIRV: %[[RESULT:.*]] = call spir_func i32 @_Z4mainj(i32 %[[INPUT]])
 
-  // CHECK-DXIL: %SV_VertexID0 = call i32 @llvm.dx.load.input.i32(i32 4, i32 
0, i32 0, i8 0, i32 poison)
-  // CHECK-DXIL:        %[[#]] = call i32 @_Z4mainj(i32 %SV_VertexID0)
+  // CHECK-DXIL: %[[INPUT:.*]] = call i32 @llvm.dx.load.input.i32(i32 0, i32 
0, i8 0, i32 poison)
+  // CHECK-DXIL: %[[RESULT:.*]] = call i32 @_Z4mainj(i32 %[[INPUT]])
   return id;
 }
 

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
index 1ea2827660307..f1d13cb70c214 100644
--- a/clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
@@ -5,8 +5,6 @@
 // CHECK-SPIRV-DAG:    @B0 = external hidden thread_local addrspace(7) 
externally_initialized constant i32, !spirv.Decorations ![[#METADATA_2:]]
 // CHECK-SPIRV-DAG:   @CC0 = external hidden thread_local addrspace(7) 
externally_initialized constant <2 x float>, !spirv.Decorations 
![[#METADATA_4:]]
 
-
-// FIXME: replace `float2 c` with a  matrix when available.
 void main(float a : AAA, int b : B, float2 c : CC) {
   float tmp = a + b + c.x + c.y;
 }
@@ -14,15 +12,15 @@ void main(float a : AAA, int b : B, float2 c : CC) {
 
 // CHECK: define void @main()
 
-// CHECK-DXIL: %AAA0 = call float @llvm.dx.load.input.f32(i32 4, i32 0, i32 0, 
i8 0, i32 poison)
-// CHECK-DXIL:   %B0 = call i32 @llvm.dx.load.input.i32(i32 4, i32 0, i32 0, 
i8 0, i32 poison)
-// CHECK-DXIL   %CC0 = call <2 x float> @llvm.dx.load.input.v2f32(i32 4, i32 
0, i32 0, i8 0, i32 poison)
-// CHECK-DXIL:         call void @_Z4mainfiDv2_f(float %AAA0, i32 %B0, <2 x 
float> %CC0)
+// CHECK-DXIL: %[[AAA:.*]] = call float @llvm.dx.load.input.f32(i32 0, i32 0, 
i8 0, i32 poison)
+// CHECK-DXIL: %[[B:.*]] = call i32 @llvm.dx.load.input.i32(i32 1, i32 0, i8 
0, i32 poison)
+// CHECK-DXIL: %[[CC:.*]] = call <2 x float> @llvm.dx.load.input.v2f32(i32 2, 
i32 0, i8 0, i32 poison)
+// CHECK-DXIL: call void @_Z4mainfiDv2_f(float %[[AAA]], i32 %[[B]], <2 x 
float> %[[CC]])
 
-// CHECK-SPIRV: %[[#AAA0:]] = load float, ptr addrspace(7) @AAA0, align 4
-// CHECK-SPIRV:   %[[#B0:]] = load i32, ptr addrspace(7) @B0, align 4
-// CHECK-SPIRV:  %[[#CC0:]] = load <2 x float>, ptr addrspace(7) @CC0, align 4
-// CHECK-SPIRV:               call spir_func void @_Z4mainfiDv2_f(float 
%[[#AAA0]], i32 %[[#B0]], <2 x float> %[[#CC0]]) [ "convergencectrl"(token %0) ]
+// CHECK-SPIRV: %[[AAA:.*]] = load float, ptr addrspace(7) @AAA0, align 4
+// CHECK-SPIRV:   %[[B:.*]] = load i32, ptr addrspace(7) @B0, align 4
+// CHECK-SPIRV:  %[[CC:.*]] = load <2 x float>, ptr addrspace(7) @CC0, align 4
+// CHECK-SPIRV:              call spir_func void @_Z4mainfiDv2_f(float 
%[[AAA]], i32 %[[B]], <2 x float> %[[CC]]) [ "convergencectrl"(token %{{.*}}) ]
 
 
 // CHECK-SPIRV-DAG: ![[#METADATA_0]] = !{![[#METADATA_1:]]}

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.array.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
index c62c4d4a517f2..524c521913a2a 100644
--- a/clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
@@ -12,20 +12,23 @@ struct S0 {
 // CHECK-SPIRV: @A2 = external hidden thread_local addrspace(7) 
externally_initialized constant <4 x float>, !spirv.Decorations ![[#MD_2:]]
 
 // CHECK:       define void @main0()
-// CHECK-DXIL:          %A0 = call [2 x <4 x float>] 
@llvm.dx.load.input.a2v4f32(i32 4, i32 0, i32 0, i8 0, i32 poison)
-// CHECK-DXIL:  %[[#TMP0:]] = insertvalue %struct.S0 poison, [2 x <4 x float>] 
%A0, 0
-// CHECK-DXIL:          %A2 = call <4 x float> @llvm.dx.load.input.v4f32(i32 
4, i32 0, i32 0, i8 0, i32 poison)
-// CHECK-DXIL:  %[[#TMP1:]] = insertvalue %struct.S0 %[[#TMP0]], <4 x float> 
%A2, 1
+// CHECK-DXIL:  %[[A0:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 0, 
i32 0, i8 0, i32 poison)
+// CHECK-DXIL: %[[POS0:.*]] = insertvalue [2 x <4 x float>] poison, <4 x 
float> %[[A0]], 0
+// CHECK-DXIL:  %[[A1:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 0, 
i32 1, i8 0, i32 poison)
+// CHECK-DXIL: %[[POS1:.*]] = insertvalue [2 x <4 x float>] %[[POS0]], <4 x 
float> %[[A1]], 1
+// CHECK-DXIL: %[[TMP0:.*]] = insertvalue %struct.S0 poison, [2 x <4 x float>] 
%[[POS1]], 0
+// CHECK-DXIL: %[[A01:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 1, 
i32 0, i8 0, i32 poison)
+// CHECK-DXIL: %[[TMP1:.*]] = insertvalue %struct.S0 %[[TMP0]], <4 x float> 
%[[A01]], 1
 
-// CHECK-SPIRV:   %[[#A0:]] = load [2 x <4 x float>], ptr addrspace(7) @A0, 
align 4
-// CHECK-SPIRV: %[[#TMP0:]] = insertvalue %struct.S0 poison, [2 x <4 x float>] 
%[[#A0]], 0
-// CHECK-SPIRV:  %[[#A01:]] = load <4 x float>, ptr addrspace(7) @A2, align 4
-// CHECK-SPIRV: %[[#TMP1:]] = insertvalue %struct.S0 %[[#TMP0]], <4 x float> 
%[[#A01]], 1
+// CHECK-SPIRV:   %[[A0:.*]] = load [2 x <4 x float>], ptr addrspace(7) @A0, 
align 4
+// CHECK-SPIRV: %[[TMP0:.*]] = insertvalue %struct.S0 poison, [2 x <4 x 
float>] %[[A0]], 0
+// CHECK-SPIRV:  %[[A01:.*]] = load <4 x float>, ptr addrspace(7) @A2, align 4
+// CHECK-SPIRV: %[[TMP1:.*]] = insertvalue %struct.S0 %[[TMP0]], <4 x float> 
%[[A01]], 1
 
-// CHECK:        %[[#ARG:]] = alloca %struct.S0
-// CHECK:                     store %struct.S0 %[[#TMP1]], ptr %[[#ARG]]
-// CHECK-DXIL:                call void @{{.*}}main0{{.*}}(ptr %[[#ARG]])
-// CHECK-SPIRV:               call spir_func void @{{.*}}main0{{.*}}(ptr 
%[[#ARG]])
+// CHECK:        %[[ARG:.*]] = alloca %struct.S0
+// CHECK:                     store %struct.S0 %[[TMP1]], ptr %[[ARG]]
+// CHECK-DXIL:                call void @{{.*}}main0{{.*}}(ptr %[[ARG]])
+// CHECK-SPIRV:               call spir_func void @{{.*}}main0{{.*}}(ptr 
%[[ARG]])
 [shader("pixel")]
 void main0(S0 p : A) {
   float tmp = p.position[0] + p.position[1] + p.color;

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
index 4e70ea037952c..8c8fe6443183e 100644
--- a/clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
@@ -10,19 +10,22 @@ struct S0 {
 
 [shader("pixel")]
 S0 main1(float4 input : A) : B {
-// CHECK:         %[[#ARG:]] = alloca %struct.S0
-// CHECK-SPIRV: %[[#INPUT:]] = load <4 x float>, ptr addrspace(7) @A0, align 4
-// CHECK-DXIL:           %A0 = call <4 x float> @llvm.dx.load.input.v4f32(i32 
4, i32 0, i32 0, i8 0, i32 poison)
-// CHECK-DXIL:                 call void @{{.*}}main1{{.*}}(ptr %[[#ARG]], <4 
x float> %A0)
-// CHECK-SPIRV:                call spir_func void @{{.*}}main1{{.*}}(ptr 
%[[#ARG]], <4 x float> %[[#INPUT]])
+// CHECK:         %[[ARG:.*]] = alloca %struct.S0
+// CHECK-SPIRV: %[[INPUT:.*]] = load <4 x float>, ptr addrspace(7) @A0, align 4
+// CHECK-DXIL:  %[[INPUT:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 
0, i32 0, i8 0, i32 poison)
+// CHECK-DXIL:                 call void @{{.*}}main1{{.*}}(ptr %[[ARG]], <4 x 
float> %[[INPUT]])
+// CHECK-SPIRV:                call spir_func void @{{.*}}main1{{.*}}(ptr 
%[[ARG]], <4 x float> %[[INPUT]])
 
-  // CHECK:        %[[#ST:]] = load %struct.S0, ptr %[[#ARG]]
-  // CHECK:       %[[#TMP:]] = extractvalue %struct.S0 %[[#ST]], 0
-  // CHECK-SPIRV:              store [2 x <4 x float>] %[[#TMP]], ptr 
addrspace(8) @B0, align 4
-  // CHECK-DXIL:               call void @llvm.dx.store.output.a2v4f32(i32 4, 
i32 0, i32 0, i8 0, [2 x <4 x float>] %[[#TMP]])
-  // CHECK:       %[[#TMP:]] = extractvalue %struct.S0 %[[#ST]], 1
-  // CHECK-SPIRV:              store <4 x float> %[[#TMP]], ptr addrspace(8) 
@B2, align 4
-  // CHECK-DXIL:               call void @llvm.dx.store.output.v4f32(i32 4, 
i32 0, i32 0, i8 0, <4 x float> %[[#TMP]])
+  // CHECK:       %[[ST:.*]] = load %struct.S0, ptr %[[ARG]]
+  // CHECK: %[[POSITIONS:.*]] = extractvalue %struct.S0 %[[ST]], 0
+  // CHECK-SPIRV:              store [2 x <4 x float>] %[[POSITIONS]], ptr 
addrspace(8) @B0, align 4
+  // CHECK-DXIL:  %[[POS0:.*]] = extractvalue [2 x <4 x float>] 
%[[POSITIONS]], 0
+  // CHECK-DXIL:               call void @llvm.dx.store.output.v4f32(i32 0, 
i32 0, i8 0, <4 x float> %[[POS0]])
+  // CHECK-DXIL:  %[[POS1:.*]] = extractvalue [2 x <4 x float>] 
%[[POSITIONS]], 1
+  // CHECK-DXIL:               call void @llvm.dx.store.output.v4f32(i32 0, 
i32 1, i8 0, <4 x float> %[[POS1]])
+  // CHECK:    %[[COLOR:.*]] = extractvalue %struct.S0 %[[ST]], 1
+  // CHECK-SPIRV:              store <4 x float> %[[COLOR]], ptr addrspace(8) 
@B2, align 4
+  // CHECK-DXIL:               call void @llvm.dx.store.output.v4f32(i32 1, 
i32 0, i8 0, <4 x float> %[[COLOR]])
 
   S0 output;
   output.position[0] = input;

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.bool.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.bool.hlsl
new file mode 100644
index 0000000000000..3d46d796b3338
--- /dev/null
+++ b/clang/test/CodeGenHLSL/semantics/semantic.bool.hlsl
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.8-vertex -x hlsl -emit-llvm 
-finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s
+
+[shader("vertex")]
+bool main(bool b : B) : A {
+  return b;
+}
+
+// DXIL signatures represent bool as i32, while the entry implementation uses
+// the i1 value representation.
+// CHECK-LABEL: define void @main()
+// CHECK: %[[INPUT:.*]] = call i32 @llvm.dx.load.input.i32(i32 0, i32 0, i8 0, 
i32 poison)
+// CHECK: %[[BOOL:.*]] = icmp ne i32 %[[INPUT]], 0
+// CHECK: %[[RESULT:.*]] = call i1 @_Z4mainb(i1 %[[BOOL]])
+// CHECK: %[[OUTPUT:.*]] = zext i1 %[[RESULT]] to i32
+// CHECK: call void @llvm.dx.store.output.i32(i32 0, i32 0, i8 0, i32 
%[[OUTPUT]])
+
+[shader("vertex")]
+bool other(bool b : D) : C {
+  return b;
+}
+
+// Signature element IDs are local to each entry point.
+// CHECK-LABEL: define void @other()
+// CHECK: call i32 @llvm.dx.load.input.i32(i32 0, i32 0, i8 0, i32 poison)
+// CHECK: call void @llvm.dx.store.output.i32(i32 0, i32 0, i8 0, i32 %{{.*}})

diff  --git 
a/clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
 
b/clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
index 57b5b777f4736..60468b179498b 100644
--- 
a/clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
+++ 
b/clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
@@ -10,18 +10,19 @@ struct Output {
 
 // CHECK: define void @main() {{.*}} {
 Output main(float4 p : SV_Position) {
-  // CHECK:   %[[#OUT:]] = alloca %struct.Output
+  // CHECK:   %[[OUT:.*]] = alloca %struct.Output
 
-  // CHECK-SPIRV:    %[[#IN:]] = load <4 x float>, ptr addrspace(7) 
@SV_Position, align 4
-  // CHECK-SPIRV:                call spir_func void @_Z4mainDv4_f(ptr 
%[[#OUT]], <4 x float> %[[#IN]])
+  // CHECK-SPIRV: %[[IN:.*]] = load <4 x float>, ptr addrspace(7) 
@SV_Position, align 4
+  // CHECK-SPIRV:             call spir_func void @_Z4mainDv4_f(ptr %[[OUT]], 
<4 x float> %[[IN]])
 
-  // CHECK-DXIL:                 call void @_Z4mainDv4_f(ptr %[[#OUT]], <4 x 
float> %SV_Position0)
+  // CHECK-DXIL: %[[IN:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 
0, i32 0, i8 0, i32 poison)
+  // CHECK-DXIL:             call void @_Z4mainDv4_f(ptr %[[OUT]], <4 x float> 
%[[IN]])
 
-  // CHECK:   %[[#TMP:]] = load %struct.Output, ptr %[[#OUT]]
-  // CHECK: %[[#FIELD:]] = extractvalue %struct.Output %[[#TMP]], 0
+  // CHECK:   %[[TMP:.*]] = load %struct.Output, ptr %[[OUT]]
+  // CHECK: %[[FIELD:.*]] = extractvalue %struct.Output %[[TMP]], 0
 
-  // CHECK-SPIRV:                store <4 x float> %[[#FIELD]], ptr 
addrspace(8) @SV_Target0, align 4
-  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 4, 
i32 0, i32 0, i8 0, <4 x float> %[[#FIELD]])
+  // CHECK-SPIRV:                store <4 x float> %[[FIELD]], ptr 
addrspace(8) @SV_Target0, align 4
+  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 0, 
i32 0, i8 0, <4 x float> %[[FIELD]])
   Output o;
   o.field = p;
   return o;

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
index 96506c5bdeaa0..a6e90b29349b9 100644
--- a/clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
@@ -5,11 +5,12 @@
 
 // CHECK: define void @main() {{.*}} {
 [[vk::location(2)]] float4 main(float4 p : SV_Position) : SV_Target {
-  // CHECK-SPIRV: %[[#R:]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 x 
float> %[[#]])
-  // CHECK-SPIRV:            store <4 x float> %[[#R]], ptr addrspace(8) 
@SV_Target0, align 4
+  // CHECK-SPIRV: %[[RESULT:.*]] = call spir_func <4 x float> @_Z4mainDv4_f(<4 
x float> %{{.*}})
+  // CHECK-SPIRV:                 store <4 x float> %[[RESULT]], ptr 
addrspace(8) @SV_Target0, align 4
 
-  // CHECK-DXIL:    %[[#TMP:]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%SV_Position0)
-  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 4, 
i32 0, i32 0, i8 0, <4 x float> %[[#TMP]])
+  // CHECK-DXIL: %[[INPUT:.*]] = call <4 x float> 
@llvm.dx.load.input.v4f32(i32 0, i32 0, i8 0, i32 poison)
+  // CHECK-DXIL: %[[RESULT:.*]] = call <4 x float> @_Z4mainDv4_f(<4 x float> 
%[[INPUT]])
+  // CHECK-DXIL:                 call void @llvm.dx.store.output.v4f32(i32 0, 
i32 0, i8 0, <4 x float> %[[RESULT]])
   return p;
 }
 

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.input.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.input.hlsl
new file mode 100644
index 0000000000000..3c46eace082ee
--- /dev/null
+++ b/clang/test/CodeGenHLSL/semantics/semantic.input.hlsl
@@ -0,0 +1,53 @@
+// Per-row load.input emission for the range of semantic leaf types:
+//   float          - scalar        -> 1 row
+//   float4         - vector        -> 1 row (4 columns)
+//   float[5]       - scalar array  -> 5 rows
+//   float4[2][3]   - vector array  -> 6 rows (multidimensional, 4 columns 
each)
+//
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm 
-finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s
+
+struct S {
+  float a       : A;
+  float4 b      : B;
+  float d[5]    : D;
+  float4 e[2][3] : E;
+};
+
+[shader("vertex")]
+void main(S s) {}
+
+// float a : A -> 1 row, 1 column.
+// CHECK: %[[A:.*]] = call float @llvm.dx.load.input.f32(i32 0, i32 0, i8 0, 
i32 poison)
+// CHECK: %[[S0:.*]] = insertvalue %struct.S poison, float %[[A]], 0
+
+// float4 b : B -> 1 row, 4 columns.
+// CHECK: %[[B:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 1, i32 0, 
i8 0, i32 poison)
+// CHECK: %[[S1:.*]] = insertvalue %struct.S %[[S0]], <4 x float> %[[B]], 1
+
+// float d[5] : D -> 5 rows, 1 column each.
+// CHECK: %[[D0:.*]] = call float @llvm.dx.load.input.f32(i32 2, i32 0, i8 0, 
i32 poison)
+// CHECK: %[[D_ARRAY0:.*]] = insertvalue [5 x float] poison, float %[[D0]], 0
+// CHECK: %[[D1:.*]] = call float @llvm.dx.load.input.f32(i32 2, i32 1, i8 0, 
i32 poison)
+// CHECK: %[[D_ARRAY1:.*]] = insertvalue [5 x float] %[[D_ARRAY0]], float 
%[[D1]], 1
+// CHECK: %[[D2:.*]] = call float @llvm.dx.load.input.f32(i32 2, i32 2, i8 0, 
i32 poison)
+// CHECK: %[[D_ARRAY2:.*]] = insertvalue [5 x float] %[[D_ARRAY1]], float 
%[[D2]], 2
+// CHECK: %[[D3:.*]] = call float @llvm.dx.load.input.f32(i32 2, i32 3, i8 0, 
i32 poison)
+// CHECK: %[[D_ARRAY3:.*]] = insertvalue [5 x float] %[[D_ARRAY2]], float 
%[[D3]], 3
+// CHECK: %[[D4:.*]] = call float @llvm.dx.load.input.f32(i32 2, i32 4, i8 0, 
i32 poison)
+// CHECK: %[[D_ARRAY4:.*]] = insertvalue [5 x float] %[[D_ARRAY3]], float 
%[[D4]], 4
+// CHECK: %[[S2:.*]] = insertvalue %struct.S %[[S1]], [5 x float] 
%[[D_ARRAY4]], 2
+
+// float4 e[2][3] : E -> 6 rows (2 x 3), 4 columns each; row-major flattening.
+// CHECK: %[[E0:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 3, i32 
0, i8 0, i32 poison)
+// CHECK: %[[E_ARRAY0:.*]] = insertvalue [2 x [3 x <4 x float>]] poison, <4 x 
float> %[[E0]], 0, 0
+// CHECK: %[[E1:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 3, i32 
1, i8 0, i32 poison)
+// CHECK: %[[E_ARRAY1:.*]] = insertvalue [2 x [3 x <4 x float>]] 
%[[E_ARRAY0]], <4 x float> %[[E1]], 0, 1
+// CHECK: %[[E2:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 3, i32 
2, i8 0, i32 poison)
+// CHECK: %[[E_ARRAY2:.*]] = insertvalue [2 x [3 x <4 x float>]] 
%[[E_ARRAY1]], <4 x float> %[[E2]], 0, 2
+// CHECK: %[[E3:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 3, i32 
3, i8 0, i32 poison)
+// CHECK: %[[E_ARRAY3:.*]] = insertvalue [2 x [3 x <4 x float>]] 
%[[E_ARRAY2]], <4 x float> %[[E3]], 1, 0
+// CHECK: %[[E4:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 3, i32 
4, i8 0, i32 poison)
+// CHECK: %[[E_ARRAY4:.*]] = insertvalue [2 x [3 x <4 x float>]] 
%[[E_ARRAY3]], <4 x float> %[[E4]], 1, 1
+// CHECK: %[[E5:.*]] = call <4 x float> @llvm.dx.load.input.v4f32(i32 3, i32 
5, i8 0, i32 poison)
+// CHECK: %[[E_ARRAY5:.*]] = insertvalue [2 x [3 x <4 x float>]] 
%[[E_ARRAY4]], <4 x float> %[[E5]], 1, 2
+// CHECK: %[[S3:.*]] = insertvalue %struct.S %[[S2]], [2 x [3 x <4 x float>]] 
%[[E_ARRAY5]], 3

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.output.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.output.hlsl
new file mode 100644
index 0000000000000..fdb195899ca97
--- /dev/null
+++ b/clang/test/CodeGenHLSL/semantics/semantic.output.hlsl
@@ -0,0 +1,56 @@
+// Per-row store.output emission for the range of semantic leaf types:
+//   float          - scalar        -> 1 row
+//   float4         - vector        -> 1 row (4 columns)
+//   float[5]       - scalar array  -> 5 rows
+//   float4[2][3]   - vector array  -> 6 rows (multidimensional, 4 columns 
each)
+//
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm 
-finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s
+
+struct S {
+  float a       : A;
+  float4 b      : B;
+  float d[5]    : D;
+  float4 e[2][3] : E;
+};
+
+[shader("vertex")]
+S main() {
+  S s;
+  return s;
+}
+
+// float a : A -> 1 row, 1 column.
+// CHECK: %[[A:.*]] = extractvalue %struct.S %[[S:.*]], 0
+// CHECK: call void @llvm.dx.store.output.f32(i32 0, i32 0, i8 0, float %[[A]])
+
+// float4 b : B -> 1 row, 4 columns; the whole vector is stored.
+// CHECK: %[[B:.*]] = extractvalue %struct.S %[[S]], 1
+// CHECK: call void @llvm.dx.store.output.v4f32(i32 1, i32 0, i8 0, <4 x 
float> %[[B]])
+
+// float d[5] : D -> 5 rows, 1 column each.
+// CHECK: %[[D:.*]] = extractvalue %struct.S %[[S]], 2
+// CHECK: %[[D0:.*]] = extractvalue [5 x float] %[[D]], 0
+// CHECK: call void @llvm.dx.store.output.f32(i32 2, i32 0, i8 0, float 
%[[D0]])
+// CHECK: %[[D1:.*]] = extractvalue [5 x float] %[[D]], 1
+// CHECK: call void @llvm.dx.store.output.f32(i32 2, i32 1, i8 0, float 
%[[D1]])
+// CHECK: %[[D2:.*]] = extractvalue [5 x float] %[[D]], 2
+// CHECK: call void @llvm.dx.store.output.f32(i32 2, i32 2, i8 0, float 
%[[D2]])
+// CHECK: %[[D3:.*]] = extractvalue [5 x float] %[[D]], 3
+// CHECK: call void @llvm.dx.store.output.f32(i32 2, i32 3, i8 0, float 
%[[D3]])
+// CHECK: %[[D4:.*]] = extractvalue [5 x float] %[[D]], 4
+// CHECK: call void @llvm.dx.store.output.f32(i32 2, i32 4, i8 0, float 
%[[D4]])
+
+// float4 e[2][3] : E -> 6 rows (2 x 3), 4 columns each; row-major flattening.
+// CHECK: %[[E:.*]] = extractvalue %struct.S %[[S]], 3
+// CHECK: %[[E00:.*]] = extractvalue [2 x [3 x <4 x float>]] %[[E]], 0, 0
+// CHECK: call void @llvm.dx.store.output.v4f32(i32 3, i32 0, i8 0, <4 x 
float> %[[E00]])
+// CHECK: %[[E01:.*]] = extractvalue [2 x [3 x <4 x float>]] %[[E]], 0, 1
+// CHECK: call void @llvm.dx.store.output.v4f32(i32 3, i32 1, i8 0, <4 x 
float> %[[E01]])
+// CHECK: %[[E02:.*]] = extractvalue [2 x [3 x <4 x float>]] %[[E]], 0, 2
+// CHECK: call void @llvm.dx.store.output.v4f32(i32 3, i32 2, i8 0, <4 x 
float> %[[E02]])
+// CHECK: %[[E10:.*]] = extractvalue [2 x [3 x <4 x float>]] %[[E]], 1, 0
+// CHECK: call void @llvm.dx.store.output.v4f32(i32 3, i32 3, i8 0, <4 x 
float> %[[E10]])
+// CHECK: %[[E11:.*]] = extractvalue [2 x [3 x <4 x float>]] %[[E]], 1, 1
+// CHECK: call void @llvm.dx.store.output.v4f32(i32 3, i32 4, i8 0, <4 x 
float> %[[E11]])
+// CHECK: %[[E12:.*]] = extractvalue [2 x [3 x <4 x float>]] %[[E]], 1, 2
+// CHECK: call void @llvm.dx.store.output.v4f32(i32 3, i32 5, i8 0, <4 x 
float> %[[E12]])

diff  --git a/clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl 
b/clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
index b1b1d2159ebac..7bf54c4984eac 100644
--- a/clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
@@ -16,15 +16,15 @@ struct Output {
 // CHECK-SPIRV-DAG:    @A4 = external hidden thread_local addrspace(8) global 
float, !spirv.Decorations ![[#METADATA_0:]]
 // CHECK-SPIRV-DAG:    @A2 = external hidden thread_local addrspace(8) global 
float, !spirv.Decorations ![[#METADATA_2:]]
 
-// CHECK: %Idx = getelementptr inbounds nuw %struct.Input, ptr %input, i32 0, 
i32 0
-// CHECK: %[[#tmp:]] = load float, ptr %Idx, align 1
-// CHECK: %a = getelementptr inbounds nuw %struct.Output, ptr %agg.result, i32 
0, i32 0
-// CHECK: store float %[[#tmp]], ptr %a, align 1
+// CHECK: %[[IDX0:.*]] = getelementptr inbounds nuw %struct.Input, ptr 
%{{.*}}, i32 0, i32 0
+// CHECK: %[[LOAD0:.*]] = load float, ptr %[[IDX0]], align 1
+// CHECK: %[[A:.*]] = getelementptr inbounds nuw %struct.Output, ptr %{{.*}}, 
i32 0, i32 0
+// CHECK: store float %[[LOAD0]], ptr %[[A]], align 1
 
-// CHECK: %Idx1 = getelementptr inbounds nuw %struct.Input, ptr %input, i32 0, 
i32 0
-// CHECK: %[[#tmp:]] = load float, ptr %Idx1, align 1
-// CHECK: %b = getelementptr inbounds nuw %struct.Output, ptr %agg.result, i32 
0, i32 1
-// CHECK: store float %[[#tmp]], ptr %b, align 1
+// CHECK: %[[IDX1:.*]] = getelementptr inbounds nuw %struct.Input, ptr 
%{{.*}}, i32 0, i32 0
+// CHECK: %[[LOAD1:.*]] = load float, ptr %[[IDX1]], align 1
+// CHECK: %[[B:.*]] = getelementptr inbounds nuw %struct.Output, ptr %{{.*}}, 
i32 0, i32 1
+// CHECK: store float %[[LOAD1]], ptr %[[B]], align 1
 
 Output main(Input input) {
   Output o;
@@ -35,18 +35,18 @@ Output main(Input input) {
 
 // Code generated in the entrypoint wrapper:
 
-// CHECK: %[[#OUTPUT:]] = alloca %struct.Output, align 8
+// CHECK: %[[OUTPUT:.*]] = alloca %struct.Output, align 8
 
-// CHECK-SPIRV: call spir_func void @_Z4main5Input(ptr %[[#OUTPUT]], ptr 
%[[#]])
-// CHECK-DXIL:  call void @_Z4main5Input(ptr %[[#OUTPUT]], ptr %[[#]])
+// CHECK-SPIRV: call spir_func void @_Z4main5Input(ptr %[[OUTPUT]], ptr 
%{{.*}})
+// CHECK-DXIL:  call void @_Z4main5Input(ptr %[[OUTPUT]], ptr %{{.*}})
 
-// CHECK: %[[#TMP:]] = load %struct.Output, ptr %[[#OUTPUT]], align 4
-// CHECK: %[[#VAL:]] = extractvalue %struct.Output %[[#TMP]], 0
-// CHECK-SPIRV:        store float %[[#VAL]], ptr addrspace(8) @A4, align 4
-// CHECK-DXIL:         call void @llvm.dx.store.output.f32(i32 4, i32 0, i32 
0, i8 0, float %[[#VAL]])
-// CHECK: %[[#VAL:]] = extractvalue %struct.Output %[[#TMP]], 1
-// CHECK-SPIRV:        store float %[[#VAL]], ptr addrspace(8) @A2, align 4
-// CHECK-DXIL:         call void @llvm.dx.store.output.f32(i32 4, i32 0, i32 
0, i8 0, float %[[#VAL]])
+// CHECK: %[[TMP:.*]] = load %struct.Output, ptr %[[OUTPUT]], align 4
+// CHECK: %[[VAL0:.*]] = extractvalue %struct.Output %[[TMP]], 0
+// CHECK-SPIRV:        store float %[[VAL0]], ptr addrspace(8) @A4, align 4
+// CHECK-DXIL:         call void @llvm.dx.store.output.f32(i32 0, i32 0, i8 0, 
float %[[VAL0]])
+// CHECK: %[[VAL1:.*]] = extractvalue %struct.Output %[[TMP]], 1
+// CHECK-SPIRV:        store float %[[VAL1]], ptr addrspace(8) @A2, align 4
+// CHECK-DXIL:         call void @llvm.dx.store.output.f32(i32 1, i32 0, i8 0, 
float %[[VAL1]])
 
 // CHECK-SPIRV-DAG: ![[#METADATA_0]] = !{![[#METADATA_1:]]}
 // CHECK-SPIRV-DAG: ![[#METADATA_2]] = !{![[#METADATA_3:]]}

diff  --git a/clang/test/CodeGenHLSL/sret_output.hlsl 
b/clang/test/CodeGenHLSL/sret_output.hlsl
index e2f806a2646f6..2f8b17d337424 100644
--- a/clang/test/CodeGenHLSL/sret_output.hlsl
+++ b/clang/test/CodeGenHLSL/sret_output.hlsl
@@ -20,13 +20,13 @@ S vs_main() {
   return s;
 };
 
-// CHECK: %[[#alloca:]] = alloca %struct.S, align 8
-// CHECK-DX:              call void @_Z7vs_mainv(ptr %[[#alloca]])
-// CHECK-VK:              call spir_func void @_Z7vs_mainv(ptr %[[#alloca]])
-// CHECK: %[[#a:]] = load %struct.S, ptr %[[#alloca]], align 4
-// CHECK: %[[#b:]] = extractvalue %struct.S %[[#a]], 0
-// CHECK-DX:         call void @llvm.dx.store.output.f32(i32 4, i32 0, i32 0, 
i8 0, float %[[#b]])
-// CHECK-VK:         store float %3, ptr addrspace(8) @A4, align 4
+// CHECK: %[[ALLOCA:.*]] = alloca %struct.S, align 8
+// CHECK-DX:              call void @_Z7vs_mainv(ptr %[[ALLOCA]])
+// CHECK-VK:              call spir_func void @_Z7vs_mainv(ptr %[[ALLOCA]])
+// CHECK: %[[S:.*]] = load %struct.S, ptr %[[ALLOCA]], align 4
+// CHECK: %[[A:.*]] = extractvalue %struct.S %[[S]], 0
+// CHECK-DX:         call void @llvm.dx.store.output.f32(i32 0, i32 0, i8 0, 
float %[[A]])
+// CHECK-VK:         store float %[[A]], ptr addrspace(8) @A4, align 4
 // CHECK:            ret void
 
 // CHECK-VK: ![[#ATTR0]] = !{![[#ATTR1:]]}

diff  --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td 
b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index 0cf68a173930a..266f80a60b5cb 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -324,16 +324,14 @@ def int_dx_group_memory_barrier_with_group_sync
 def int_dx_load_input
     : DefaultAttrsIntrinsic<
           [llvm_any_ty],
-          [llvm_i32_ty /*sigpointId*/, llvm_i32_ty /*sigElementId*/,
-           llvm_i32_ty /*rowIndex*/, llvm_i8_ty /*colIndex*/,
-           llvm_i32_ty /*gsVertexOrPrimIndex*/],
+          [llvm_i32_ty /*SigElementId*/, llvm_i32_ty /*RowIndex*/,
+           llvm_i8_ty /*ColIndex*/, llvm_i32_ty /*GsVertexOrPrimIndex*/],
           [IntrConvergent]>;
 
 def int_dx_store_output
     : DefaultAttrsIntrinsic<
           [],
-          [llvm_i32_ty /*sigpointId*/, llvm_i32_ty /*sigElementId*/,
-           llvm_i32_ty /*rowIndex*/, llvm_i8_ty /*colIndex*/,
-           llvm_any_ty /*value*/],
+          [llvm_i32_ty /*SigElementId*/, llvm_i32_ty /*RowIndex*/,
+           llvm_i8_ty /*ColIndex*/, llvm_any_ty /*Value*/],
           [IntrConvergent]>;
 }

diff  --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index ad41a7756d3ea..5f13f9aba41f2 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -414,9 +414,7 @@ class DXILOp<int opcode, DXILOpClass opclass> {
 
 def LoadInput : DXILOp<4, loadInput> {
   let Doc = "Loads a scalar value from a shader input register component.";
-  let intrinsics = [IntrinSelect<int_dx_load_input,
-      [IntrinArgIndex<1>, IntrinArgIndex<2>, IntrinArgIndex<3>,
-       IntrinArgIndex<4>]>];
+  let intrinsics = [IntrinSelect<int_dx_load_input>];
   // inputSigId, rowIndex, colIndex, gsVertexOrPrimIndex
   let arguments = [Int32Ty, Int32Ty, Int8Ty, Int32Ty];
   let result = OverloadTy;
@@ -427,9 +425,7 @@ def LoadInput : DXILOp<4, loadInput> {
 
 def StoreOutput : DXILOp<5, storeOutput> {
   let Doc = "Stores a scalar value to a shader output register component.";
-  let intrinsics = [IntrinSelect<int_dx_store_output,
-      [IntrinArgIndex<1>, IntrinArgIndex<2>, IntrinArgIndex<3>,
-       IntrinArgIndex<4>]>];
+  let intrinsics = [IntrinSelect<int_dx_store_output>];
   // outputSigId, rowIndex, colIndex, value
   let arguments = [Int32Ty, Int32Ty, Int8Ty, OverloadTy];
   let result = VoidTy;

diff  --git a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp 
b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
index cbaf21f279581..c03ff3936f56b 100644
--- a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+++ b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
@@ -1195,7 +1195,7 @@ static Value *expandMatrixTranspose(CallInst *Orig) {
 // The DXIL StoreOutput op is per-component; vector intrinsics are split here
 // so that DXILOpLowering sees only scalar variants.
 static bool expandStoreOutput(CallInst *Orig) {
-  auto *VT = dyn_cast<FixedVectorType>(Orig->getArgOperand(4)->getType());
+  auto *VT = dyn_cast<FixedVectorType>(Orig->getArgOperand(3)->getType());
   if (!VT)
     return false; // already scalar, nothing to expand
 
@@ -1206,11 +1206,10 @@ static bool expandStoreOutput(CallInst *Orig) {
   Type *ScalarTy = VT->getElementType();
   unsigned NumElems = VT->getNumElements();
 
-  Value *SigpointId = Orig->getArgOperand(0);
-  Value *SigElementId = Orig->getArgOperand(1);
-  Value *RowIndex = Orig->getArgOperand(2);
-  Value *StartCol = Orig->getArgOperand(3); // i8
-  Value *Data = Orig->getArgOperand(4);
+  Value *SigElementId = Orig->getArgOperand(0);
+  Value *RowIndex = Orig->getArgOperand(1);
+  Value *StartCol = Orig->getArgOperand(2); // i8
+  Value *Data = Orig->getArgOperand(3);
   Value *StartColI32 = Builder.CreateZExt(StartCol, Int32Ty);
 
   Function *ScalarFn = Intrinsic::getOrInsertDeclaration(
@@ -1222,8 +1221,7 @@ static bool expandStoreOutput(CallInst *Orig) {
     Value *ColIdx =
         Builder.CreateAdd(StartColI32, ConstantInt::get(Int32Ty, I));
     Value *ColI8 = Builder.CreateTrunc(ColIdx, Int8Ty);
-    Builder.CreateCall(ScalarFn,
-                       {SigpointId, SigElementId, RowIndex, ColI8, Scalar});
+    Builder.CreateCall(ScalarFn, {SigElementId, RowIndex, ColI8, Scalar});
   }
 
   Orig->eraseFromParent();
@@ -1244,11 +1242,10 @@ static Value *expandLoadInput(CallInst *Orig) {
   Type *ScalarTy = VT->getElementType();
   unsigned NumElems = VT->getNumElements();
 
-  Value *SigpointId = Orig->getArgOperand(0);
-  Value *SigElementId = Orig->getArgOperand(1);
-  Value *RowIndex = Orig->getArgOperand(2);
-  Value *StartCol = Orig->getArgOperand(3); // i8
-  Value *GsVertexOrPrimIndex = Orig->getArgOperand(4);
+  Value *SigElementId = Orig->getArgOperand(0);
+  Value *RowIndex = Orig->getArgOperand(1);
+  Value *StartCol = Orig->getArgOperand(2); // i8
+  Value *GsVertexOrPrimIndex = Orig->getArgOperand(3);
   Value *StartColI32 = Builder.CreateZExt(StartCol, Int32Ty);
 
   Function *ScalarFn = Intrinsic::getOrInsertDeclaration(
@@ -1259,9 +1256,8 @@ static Value *expandLoadInput(CallInst *Orig) {
     Value *ColIdx =
         Builder.CreateAdd(StartColI32, ConstantInt::get(Int32Ty, I));
     Value *ColI8 = Builder.CreateTrunc(ColIdx, Int8Ty);
-    Value *Scalar =
-        Builder.CreateCall(ScalarFn, {SigpointId, SigElementId, RowIndex, 
ColI8,
-                                      GsVertexOrPrimIndex});
+    Value *Scalar = Builder.CreateCall(
+        ScalarFn, {SigElementId, RowIndex, ColI8, GsVertexOrPrimIndex});
     Vec =
         Builder.CreateInsertElement(Vec, Scalar, ConstantInt::get(Int32Ty, I));
   }

diff  --git a/llvm/test/CodeGen/DirectX/LoadInput.ll 
b/llvm/test/CodeGen/DirectX/LoadInput.ll
index b29167d2dfb27..7eaed85b2df2c 100644
--- a/llvm/test/CodeGen/DirectX/LoadInput.ll
+++ b/llvm/test/CodeGen/DirectX/LoadInput.ll
@@ -8,7 +8,7 @@ define float @load_scalar_f32() {
   ; CHECK: [[V:%.*]] = call float @dx.op.loadInput.f32(i32 4, i32 0, i32 1, i8 
2, i32 0)
   ; CHECK-NEXT: ret float [[V]]
   ; CHECK-NOT: llvm.dx.load.input
-  %v = call float @llvm.dx.load.input.f32(i32 99, i32 0, i32 1, i8 2, i32 0)
+  %v = call float @llvm.dx.load.input.f32(i32 0, i32 1, i8 2, i32 0)
   ret float %v
 }
 
@@ -24,7 +24,7 @@ define <4 x float> @load_v4f32() {
   ; CHECK: [[S3:%.*]] = call float @dx.op.loadInput.f32(i32 4, i32 1, i32 0, 
i8 3, i32 0)
   ; CHECK-NEXT: insertelement {{.*}}, float [[S3]], i32 3
   ; CHECK-NOT: llvm.dx.load.input
-  %v = call <4 x float> @llvm.dx.load.input.v4f32(i32 99, i32 1, i32 0, i8 0, 
i32 0)
+  %v = call <4 x float> @llvm.dx.load.input.v4f32(i32 1, i32 0, i8 0, i32 0)
   ret <4 x float> %v
 }
 
@@ -36,7 +36,7 @@ define <2 x float> @load_v2f32_col2() {
   ; CHECK: [[S1:%.*]] = call float @dx.op.loadInput.f32(i32 4, i32 2, i32 0, 
i8 3, i32 0)
   ; CHECK-NEXT: insertelement {{.*}}, float [[S1]], i32 1
   ; CHECK-NOT: llvm.dx.load.input
-  %v = call <2 x float> @llvm.dx.load.input.v2f32(i32 99, i32 2, i32 0, i8 2, 
i32 0)
+  %v = call <2 x float> @llvm.dx.load.input.v2f32(i32 2, i32 0, i8 2, i32 0)
   ret <2 x float> %v
 }
 
@@ -46,6 +46,6 @@ define i32 @load_scalar_i32() {
   ; CHECK: [[V:%.*]] = call i32 @dx.op.loadInput.i32(i32 4, i32 2, i32 0, i8 
0, i32 0)
   ; CHECK-NEXT: ret i32 [[V]]
   ; CHECK-NOT: llvm.dx.load.input
-  %v = call i32 @llvm.dx.load.input.i32(i32 99, i32 2, i32 0, i8 0, i32 0)
+  %v = call i32 @llvm.dx.load.input.i32(i32 2, i32 0, i8 0, i32 0)
   ret i32 %v
 }

diff  --git a/llvm/test/CodeGen/DirectX/StoreOutput.ll 
b/llvm/test/CodeGen/DirectX/StoreOutput.ll
index 04970a1488710..e67c972941ba4 100644
--- a/llvm/test/CodeGen/DirectX/StoreOutput.ll
+++ b/llvm/test/CodeGen/DirectX/StoreOutput.ll
@@ -7,7 +7,7 @@ target triple = "dxil-pc-shadermodel6.0-pixel"
 define void @store_scalar_f32(float %val) {
   ; CHECK: call void @dx.op.storeOutput.f32(i32 5, i32 0, i32 1, i8 2, float 
%val)
   ; CHECK-NOT: llvm.dx.store.output
-  call void @llvm.dx.store.output.f32(i32 99, i32 0, i32 1, i8 2, float %val)
+  call void @llvm.dx.store.output.f32(i32 0, i32 1, i8 2, float %val)
   ret void
 }
 
@@ -23,7 +23,7 @@ define void @store_v4f32(<4 x float> %val) {
   ; CHECK-NEXT: [[E3:%.*]] = extractelement <4 x float> %val, i32 3
   ; CHECK-NEXT: call void @dx.op.storeOutput.f32(i32 5, i32 1, i32 0, i8 3, 
float [[E3]])
   ; CHECK-NOT: llvm.dx.store.output
-  call void @llvm.dx.store.output.v4f32(i32 99, i32 1, i32 0, i8 0, <4 x 
float> %val)
+  call void @llvm.dx.store.output.v4f32(i32 1, i32 0, i8 0, <4 x float> %val)
   ret void
 }
 
@@ -35,7 +35,7 @@ define void @store_v2f32_col2(<2 x float> %val) {
   ; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x float> %val, i32 1
   ; CHECK-NEXT: call void @dx.op.storeOutput.f32(i32 5, i32 2, i32 0, i8 3, 
float [[E1]])
   ; CHECK-NOT: llvm.dx.store.output
-  call void @llvm.dx.store.output.v2f32(i32 99, i32 2, i32 0, i8 2, <2 x 
float> %val)
+  call void @llvm.dx.store.output.v2f32(i32 2, i32 0, i8 2, <2 x float> %val)
   ret void
 }
 
@@ -44,6 +44,6 @@ define void @store_v2f32_col2(<2 x float> %val) {
 define void @store_scalar_i32(i32 %val) {
   ; CHECK: call void @dx.op.storeOutput.i32(i32 5, i32 2, i32 0, i8 0, i32 
%val)
   ; CHECK-NOT: llvm.dx.store.output
-  call void @llvm.dx.store.output.i32(i32 99, i32 2, i32 0, i8 0, i32 %val)
+  call void @llvm.dx.store.output.i32(i32 2, i32 0, i8 0, i32 %val)
   ret void
 }


        
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