================
@@ -5672,6 +5672,65 @@ def CIR_VecSplatOp : CIR_Op<"vec.splat", [
}];
}
+//===----------------------------------------------------------------------===//
+// OffloadKind
+//===----------------------------------------------------------------------===//
+
+def CIR_OffloadKind : CIR_I32EnumAttr<"OffloadKind", "offload kind", [
+ I32EnumAttrCase<"Host", 0, "host">,
+ I32EnumAttrCase<"Device", 1, "device">
+]> {
+ let genSpecializedAttr = 0;
+}
+
+def CIR_OffloadKindAttr : CIR_EnumAttr<CIR_OffloadKind, "offload_kind"> {
+ let summary = "Offload kind (host or device)";
+}
+
+//===----------------------------------------------------------------------===//
+// OffloadContainerOp
+//===----------------------------------------------------------------------===//
+
+def CIR_OffloadContainerOp : CIR_Op<"offload.container", [
+ NoRegionArguments, NoTerminator, SingleBlock, SymbolTable]> {
+ let summary = "Container for host and device CIR modules";
+ let description = [{
+ `cir.offload.container` groups one host CIR module with one or more device
+ CIR modules for offload-aware analysis and transformation.
+
+ The body holds nested `builtin.module` operations. The first nested
+ module is the host module and must carry
+ `cir.offload.kind = #cir.offload_kind<host>`. All remaining nested
+ modules are device modules and must carry
+ `cir.offload.kind = #cir.offload_kind<device>`. There must be at least
+ one device module.
+
+ Example:
+
+ ```mlir
+ cir.offload.container {
+ builtin.module @host attributes {cir.offload.kind =
#cir.offload_kind<host>} {
----------------
RiverDave wrote:
I've done a follow up for this on commit:
https://github.com/llvm/llvm-project/pull/206576/changes/9d0f66f6fe743d75f3cae14b5e7412e646b6116a,
let me know if that addresses things ^^
https://github.com/llvm/llvm-project/pull/206576
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