This revision was automatically updated to reflect the committed changes.
Closed by commit rL317423: Add ifdefs around ELF specific parts of
UnwindRegisters*.S for arm (authored by mstorsjo).
Changed prior to commit:
https://reviews.llvm.org/D39534?vs=121245&id=121600#toc
Repository:
rL LLVM
https://reviews.llvm.org/D39534
Files:
libunwind/trunk/docs/index.rst
libunwind/trunk/src/UnwindRegistersRestore.S
libunwind/trunk/src/UnwindRegistersSave.S
Index: libunwind/trunk/docs/index.rst
===================================================================
--- libunwind/trunk/docs/index.rst
+++ libunwind/trunk/docs/index.rst
@@ -52,7 +52,7 @@
Linux i386, x86_64, ARM64 Clang, GCC DWARF CFI
Mac OS X i386, x86_64 Clang, GCC DWARF CFI
NetBSD x86_64 Clang, GCC DWARF CFI
-Windows i386, x86_64 Clang DWARF CFI
+Windows i386, x86_64, ARM Clang DWARF CFI
============ ==================== ============ ========================
The following minimum compiler versions are strongly recommended.
Index: libunwind/trunk/src/UnwindRegistersSave.S
===================================================================
--- libunwind/trunk/src/UnwindRegistersSave.S
+++ libunwind/trunk/src/UnwindRegistersSave.S
@@ -375,7 +375,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.fpu vfpv3-d16
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy)
vstmia r0, {d0-d15}
JMP(lr)
@@ -387,7 +389,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.fpu vfpv3-d16
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMXEPy)
vstmia r0, {d0-d15} @ fstmiax is deprecated in ARMv7+ and now behaves like vstmia
JMP(lr)
@@ -399,7 +403,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.fpu vfpv3
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPy)
@ VFP and iwMMX instructions are only available when compiling with the flags
@ that enable them. We do not want to do that in the library (because we do not
@@ -420,7 +426,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.arch armv5te
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveiWMMXEPy)
stcl p1, cr0, [r0], #8 @ wstrd wR0, [r0], #8
stcl p1, cr1, [r0], #8 @ wstrd wR1, [r0], #8
@@ -447,7 +455,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.arch armv5te
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveiWMMXControlEPj)
stc2 p1, cr8, [r0], #4 @ wstrw wCGR0, [r0], #4
stc2 p1, cr9, [r0], #4 @ wstrw wCGR1, [r0], #4
Index: libunwind/trunk/src/UnwindRegistersRestore.S
===================================================================
--- libunwind/trunk/src/UnwindRegistersRestore.S
+++ libunwind/trunk/src/UnwindRegistersRestore.S
@@ -391,7 +391,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.fpu vfpv3-d16
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMDEPy)
@ VFP and iwMMX instructions are only available when compiling with the flags
@ that enable them. We do not want to do that in the library (because we do not
@@ -410,7 +412,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.fpu vfpv3-d16
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMXEPy)
vldmia r0, {d0-d15} @ fldmiax is deprecated in ARMv7+ and now behaves like vldmia
JMP(lr)
@@ -422,7 +426,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.fpu vfpv3
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPy)
vldmia r0, {d16-d31}
JMP(lr)
@@ -436,7 +442,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.arch armv5te
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreiWMMXEPy)
ldcl p1, cr0, [r0], #8 @ wldrd wR0, [r0], #8
ldcl p1, cr1, [r0], #8 @ wldrd wR1, [r0], #8
@@ -463,7 +471,9 @@
@ values pointer is in r0
@
.p2align 2
+#if defined(__ELF__)
.arch armv5te
+#endif
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreiWMMXControlEPj)
ldc2 p1, cr8, [r0], #4 @ wldrw wCGR0, [r0], #4
ldc2 p1, cr9, [r0], #4 @ wldrw wCGR1, [r0], #4
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