https://github.com/AmrDeveloper created 
https://github.com/llvm/llvm-project/pull/216681

Support the Vector of bool type in Bitwise And, Or, and XOR operations

>From 98ff5afdd49a8965747e3b68e2e992a12db0e219 Mon Sep 17 00:00:00 2001
From: Amr Hesham <[email protected]>
Date: Mon, 17 Aug 2026 12:10:50 +0200
Subject: [PATCH] [CIR] Support Vector of bool in Bitwise And, Or and XOR ops

---
 .../CIR/Dialect/IR/CIRTypeConstraints.td      |  8 +--
 clang/test/CIR/CodeGen/vector-bool.cpp        | 53 +++++++++++++++++++
 2 files changed, 58 insertions(+), 3 deletions(-)

diff --git a/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td 
b/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
index c8f3eff18ce5c..afdd732a5867f 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
@@ -328,10 +328,12 @@ def IntegerVector : Type<
 }
 
 // Vector of type constraints
+def CIR_VectorOfBoolType : CIR_VectorTypeOf<[CIR_AnyBoolType]>;
 def CIR_VectorOfIntType : CIR_VectorTypeOf<[CIR_AnyIntType]>;
 def CIR_VectorOfUIntType : CIR_VectorTypeOf<[CIR_AnyUIntType]>;
 def CIR_VectorOfSIntType : CIR_VectorTypeOf<[CIR_AnySIntType]>;
 def CIR_VectorOfFloatType : CIR_VectorTypeOf<[CIR_AnyFloatType]>;
+def CIR_VectorOfIntOrBoolType : CIR_VectorTypeOf<[CIR_AnyBoolType, 
CIR_AnyIntType]>;
 
 // Vector or Scalar type constraints
 def CIR_AnyIntOrVecOfIntType
@@ -359,10 +361,10 @@ def CIR_AnyFloatOrVecOfFloatType
 }
 
 // Types valid for bitwise ops (and/or/xor):
-// integer, boolean, or vector of integer (no floating-point).
+// integer, boolean, or vector of bool or integer (no floating-point).
 def CIR_AnyBitwiseType
-    : AnyTypeOf<[CIR_AnyIntType, CIR_AnyBoolType, CIR_VectorOfIntType],
-                "integer, boolean, or vector of integer">;
+    : AnyTypeOf<[CIR_AnyIntType, CIR_AnyBoolType, CIR_VectorOfIntOrBoolType],
+                "integer, boolean, or vector of bool or integer">;
 
 
//===----------------------------------------------------------------------===//
 // Data member type predicates
diff --git a/clang/test/CIR/CodeGen/vector-bool.cpp 
b/clang/test/CIR/CodeGen/vector-bool.cpp
index dd4a5f65aec05..2923206988edf 100644
--- a/clang/test/CIR/CodeGen/vector-bool.cpp
+++ b/clang/test/CIR/CodeGen/vector-bool.cpp
@@ -149,3 +149,56 @@ void vec_bool_5_load_store_with_padding_needed() {
 // SHARED: %[[INSERT_VEC:.*]] = shufflevector <5 x i1> %[[EXTRACT_VEC]], <5 x 
i1> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 poison, i32 
poison, i32 poison>
 // SHARED: %[[RESULT:.*]] = bitcast <8 x i1> %[[INSERT_VEC]] to i8
 // SHARED: store i8 %[[RESULT]], ptr %[[A_ADDR]], align 1
+
+void vec_bool_bitwise_operators() {
+  v8b a;
+  v8b b;
+  v8b v_or = a | b;
+  v8b v_and = a & b;
+  v8b v_xor = a ^ b;
+}
+
+// CIR: %[[A_ADDR:.*]] = cir.alloca "a" {{.*}} : !cir.ptr<!cir.vector<8 x 
!cir.bool>>
+// CIR: %[[B_ADDR:.*]] = cir.alloca "b" {{.*}} : !cir.ptr<!cir.vector<8 x 
!cir.bool>>
+// CIR: %[[OR_ADDR:.*]] = cir.alloca "v_or" {{.*}} init : 
!cir.ptr<!cir.vector<8 x !cir.bool>>
+// CIR: %[[AND_ADDR:.*]] = cir.alloca "v_and" {{.*}} init : 
!cir.ptr<!cir.vector<8 x !cir.bool>>
+// CIR: %[[XOR_ADDR:.*]] = cir.alloca "v_xor" {{.*}} init : 
!cir.ptr<!cir.vector<8 x !cir.bool>>
+// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<8 x 
!cir.bool>>, !cir.vector<8 x !cir.bool>
+// CIR: %[[TMP_B:.*]] = cir.load {{.*}} %[[B_ADDR]] : !cir.ptr<!cir.vector<8 x 
!cir.bool>>, !cir.vector<8 x !cir.bool>
+// CIR: %[[OR:.*]] = cir.or %[[TMP_A]], %[[TMP_B]] : !cir.vector<8 x !cir.bool>
+// CIR: cir.store {{.*}} %[[OR]], %[[OR_ADDR]] : !cir.vector<8 x !cir.bool>, 
!cir.ptr<!cir.vector<8 x !cir.bool>>
+// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<8 x 
!cir.bool>>, !cir.vector<8 x !cir.bool>
+// CIR: %[[TMP_B:.*]] = cir.load {{.*}} %[[B_ADDR]] : !cir.ptr<!cir.vector<8 x 
!cir.bool>>, !cir.vector<8 x !cir.bool>
+// CIR: %[[AND:.*]] = cir.and %[[TMP_A]], %[[TMP_B]] : !cir.vector<8 x 
!cir.bool>
+// CIR: cir.store {{.*}} %[[AND]], %[[AND_ADDR]] : !cir.vector<8 x !cir.bool>, 
!cir.ptr<!cir.vector<8 x !cir.bool>>
+// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<8 x 
!cir.bool>>, !cir.vector<8 x !cir.bool>
+// CIR: %[[TMP_B:.*]] = cir.load {{.*}} %[[B_ADDR]] : !cir.ptr<!cir.vector<8 x 
!cir.bool>>, !cir.vector<8 x !cir.bool>
+// CIR: %[[XOR:.*]] = cir.xor %[[TMP_A]], %[[TMP_B]] : !cir.vector<8 x 
!cir.bool>
+// CIR: cir.store {{.*}} %[[XOR]], %[[XOR_ADDR]] : !cir.vector<8 x !cir.bool>, 
!cir.ptr<!cir.vector<8 x !cir.bool>>
+
+// SHARED: %[[A_ADDR:.*]] = alloca i8, align 1
+// SHARED: %[[B_ADDR:.*]] = alloca i8, align 1
+// SHARED: %[[OR_ADDR:.*]] = alloca i8, align 1
+// SHARED: %[[AND_ADDR:.*]] = alloca i8, align 1
+// SHARED: %[[XOR_ADDR:.*]] = alloca i8, align 1
+// SHARED: %[[TMP_A:.*]] = load i8, ptr %[[A_ADDR]], align 1
+// SHARED: %[[TMP_A_VEC:.*]] = bitcast i8 %[[TMP_A]] to <8 x i1>
+// SHARED: %[[TMP_B:.*]] = load i8, ptr %[[B_ADDR]], align 1
+// SHARED: %[[TMP_B_VEC:.*]] = bitcast i8 %[[TMP_B]] to <8 x i1>
+// SHARED: %[[OR:.*]] = or <8 x i1> %[[TMP_A_VEC]], %[[TMP_B_VEC]]
+// SHARED: %[[OR_I8:.*]] = bitcast <8 x i1> %[[OR]] to i8
+// SHARED: store i8 %[[OR_I8]], ptr %[[OR_ADDR]], align 1
+// SHARED: %[[TMP_A:.*]] = load i8, ptr %[[A_ADDR]], align 1
+// SHARED: %[[TMP_A_VEC:.*]] = bitcast i8 %[[TMP_A]] to <8 x i1>
+// SHARED: %[[TMP_B:.*]] = load i8, ptr %[[B_ADDR]], align 1
+// SHARED: %[[TMP_B_VEC:.*]] = bitcast i8 %[[TMP_B]] to <8 x i1>
+// SHARED: %[[AND:.*]] = and <8 x i1> %[[TMP_A_VEC]], %[[TMP_B_VEC]]
+// SHARED: %[[AND_I8:.*]] = bitcast <8 x i1> %[[AND]] to i8
+// SHARED: store i8 %[[AND_I8]], ptr %[[AND_ADDR]], align 1
+// SHARED: %[[TMP_A:.*]] = load i8, ptr %[[A_ADDR]], align 1
+// SHARED: %[[TMP_A_VEC:.*]] = bitcast i8 %[[TMP_A]] to <8 x i1>
+// SHARED: %[[TMP_B:.*]] = load i8, ptr %[[B_ADDR]], align 1
+// SHARED: %[[TMP_B_VEC:.*]] = bitcast i8 %[[TMP_B]] to <8 x i1>
+// SHARED: %[[XOR:.*]] = xor <8 x i1> %[[TMP_A_VEC]], %[[TMP_B_VEC]]
+// SHARED: %[[XOR_I8:.*]] = bitcast <8 x i1> %[[XOR]] to i8
+// SHARED: store i8 %[[XOR_I8]], ptr %[[XOR_ADDR]], align 1

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