llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-x86 Author: Mikołaj Piróg (mikolaj-pirog) <details> <summary>Changes</summary> Attribute target testing was missing a bunch of checks -- this adds them. One apxf check was in a wrong test, and one test (attr-target-x86-mmx.c) is now redundant. We support AVX5124VNNIW/4FMAPS in LLVM, but not in compiler-rt; this makes it impossible to multiversion for knm/knl. For consistency sake, I've added missing support (though it's worth noting that GCC completely removed the support for Xeon Phi). --- Patch is 39.90 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/218697.diff 5 Files Affected: - (modified) clang/test/CodeGen/attr-target-mv.c (+157-5) - (removed) clang/test/CodeGen/attr-target-x86-mmx.c (-21) - (modified) clang/test/CodeGen/attr-target-x86.c (+606) - (modified) compiler-rt/lib/builtins/cpu_model/x86.c (+7-1) - (modified) llvm/include/llvm/TargetParser/X86TargetParser.def (+2-2) ``````````diff diff --git a/clang/test/CodeGen/attr-target-mv.c b/clang/test/CodeGen/attr-target-mv.c index f4a9667aa403e..aceb8672d76c0 100644 --- a/clang/test/CodeGen/attr-target-mv.c +++ b/clang/test/CodeGen/attr-target-mv.c @@ -32,7 +32,21 @@ int __attribute__((target("arch=clearwaterforest"))) foo(void) {return 26;} int __attribute__((target("arch=diamondrapids"))) foo(void) {return 27;} int __attribute__((target("arch=wildcatlake"))) foo(void) {return 28;} int __attribute__((target("arch=novalake"))) foo(void) {return 29;} -int __attribute__((target("apxf"))) foo(void) {return 30;} +int __attribute__((target("arch=corei7"))) foo(void) {return 30;} +int __attribute__((target("arch=bonnell"))) foo(void) {return 31;} +int __attribute__((target("arch=atom"))) foo(void) {return 32;} +int __attribute__((target("arch=silvermont"))) foo(void) {return 33;} +int __attribute__((target("arch=slm"))) foo(void) {return 34;} +int __attribute__((target("arch=knl"))) foo(void) {return 35;} +int __attribute__((target("arch=knm"))) foo(void) {return 36;} +int __attribute__((target("arch=nehalem"))) foo(void) {return 37;} +int __attribute__((target("arch=westmere"))) foo(void) {return 38;} +int __attribute__((target("arch=haswell"))) foo(void) {return 39;} +int __attribute__((target("arch=broadwell"))) foo(void) {return 40;} +int __attribute__((target("arch=skylake"))) foo(void) {return 41;} +int __attribute__((target("arch=skylake-avx512"))) foo(void) {return 42;} +int __attribute__((target("arch=cannonlake"))) foo(void) {return 43;} +int __attribute__((target("arch=cascadelake"))) foo(void) {return 44;} int __attribute__((target("default"))) foo(void) { return 2; } int bar(void) { @@ -210,8 +224,36 @@ void calls_pr50025c(void) { pr50025c(); } // ITANIUM: ret i32 28 // ITANIUM: define{{.*}} i32 @foo.arch_novalake() // ITANIUM: ret i32 29 -// ITANIUM: define{{.*}} i32 @foo.apxf() +// ITANIUM: define{{.*}} i32 @foo.arch_corei7() // ITANIUM: ret i32 30 +// ITANIUM: define{{.*}} i32 @foo.arch_bonnell() +// ITANIUM: ret i32 31 +// ITANIUM: define{{.*}} i32 @foo.arch_atom() +// ITANIUM: ret i32 32 +// ITANIUM: define{{.*}} i32 @foo.arch_silvermont() +// ITANIUM: ret i32 33 +// ITANIUM: define{{.*}} i32 @foo.arch_slm() +// ITANIUM: ret i32 34 +// ITANIUM: define{{.*}} i32 @foo.arch_knl() +// ITANIUM: ret i32 35 +// ITANIUM: define{{.*}} i32 @foo.arch_knm() +// ITANIUM: ret i32 36 +// ITANIUM: define{{.*}} i32 @foo.arch_nehalem() +// ITANIUM: ret i32 37 +// ITANIUM: define{{.*}} i32 @foo.arch_westmere() +// ITANIUM: ret i32 38 +// ITANIUM: define{{.*}} i32 @foo.arch_haswell() +// ITANIUM: ret i32 39 +// ITANIUM: define{{.*}} i32 @foo.arch_broadwell() +// ITANIUM: ret i32 40 +// ITANIUM: define{{.*}} i32 @foo.arch_skylake() +// ITANIUM: ret i32 41 +// ITANIUM: define{{.*}} i32 @foo.arch_skylake-avx512() +// ITANIUM: ret i32 42 +// ITANIUM: define{{.*}} i32 @foo.arch_cannonlake() +// ITANIUM: ret i32 43 +// ITANIUM: define{{.*}} i32 @foo.arch_cascadelake() +// ITANIUM: ret i32 44 // ITANIUM: define{{.*}} i32 @foo() // ITANIUM: ret i32 2 // ITANIUM: define{{.*}} i32 @bar() @@ -275,8 +317,36 @@ void calls_pr50025c(void) { pr50025c(); } // WINDOWS: ret i32 28 // WINDOWS: define dso_local i32 @foo.arch_novalake() // WINDOWS: ret i32 29 -// WINDOWS: define dso_local i32 @foo.apxf() +// WINDOWS: define dso_local i32 @foo.arch_corei7() // WINDOWS: ret i32 30 +// WINDOWS: define dso_local i32 @foo.arch_bonnell() +// WINDOWS: ret i32 31 +// WINDOWS: define dso_local i32 @foo.arch_atom() +// WINDOWS: ret i32 32 +// WINDOWS: define dso_local i32 @foo.arch_silvermont() +// WINDOWS: ret i32 33 +// WINDOWS: define dso_local i32 @foo.arch_slm() +// WINDOWS: ret i32 34 +// WINDOWS: define dso_local i32 @foo.arch_knl() +// WINDOWS: ret i32 35 +// WINDOWS: define dso_local i32 @foo.arch_knm() +// WINDOWS: ret i32 36 +// WINDOWS: define dso_local i32 @foo.arch_nehalem() +// WINDOWS: ret i32 37 +// WINDOWS: define dso_local i32 @foo.arch_westmere() +// WINDOWS: ret i32 38 +// WINDOWS: define dso_local i32 @foo.arch_haswell() +// WINDOWS: ret i32 39 +// WINDOWS: define dso_local i32 @foo.arch_broadwell() +// WINDOWS: ret i32 40 +// WINDOWS: define dso_local i32 @foo.arch_skylake() +// WINDOWS: ret i32 41 +// WINDOWS: define dso_local i32 @foo.arch_skylake-avx512() +// WINDOWS: ret i32 42 +// WINDOWS: define dso_local i32 @foo.arch_cannonlake() +// WINDOWS: ret i32 43 +// WINDOWS: define dso_local i32 @foo.arch_cascadelake() +// WINDOWS: ret i32 44 // WINDOWS: define dso_local i32 @foo() // WINDOWS: ret i32 2 // WINDOWS: define dso_local i32 @bar() @@ -285,18 +355,100 @@ void calls_pr50025c(void) { pr50025c(); } // ITANIUM: define weak_odr ptr @foo.resolver() #[[ATTR_RESOLVER:[0-9]+]] // LINUX-SAME: comdat // ITANIUM: call void @__cpu_indicator_init() -// ITANIUM: ret ptr @foo.apxf +// ITANIUM: ret ptr @foo.arch_diamondrapids +// ITANIUM: ret ptr @foo.arch_tigerlake +// ITANIUM: ret ptr @foo.arch_cooperlake +// ITANIUM: ret ptr @foo.arch_cascadelake +// ITANIUM: ret ptr @foo.arch_icelake-client +// ITANIUM: ret ptr @foo.arch_icelake-server +// ITANIUM: ret ptr @foo.arch_rocketlake +// ITANIUM: ret ptr @foo.arch_cannonlake +// ITANIUM: ret ptr @foo.arch_knl +// ITANIUM: ret ptr @foo.arch_skylake-avx512 +// ITANIUM: ret ptr @foo.arch_alderlake +// ITANIUM: ret ptr @foo.arch_raptorlake +// ITANIUM: ret ptr @foo.arch_meteorlake +// ITANIUM: ret ptr @foo.arch_sierraforest +// ITANIUM: ret ptr @foo.arch_grandridge +// ITANIUM: ret ptr @foo.arch_arrowlake +// ITANIUM: ret ptr @foo.arch_arrowlake-s +// ITANIUM: ret ptr @foo.arch_lunarlake +// ITANIUM: ret ptr @foo.arch_gracemont +// ITANIUM: ret ptr @foo.arch_pantherlake +// ITANIUM: ret ptr @foo.arch_clearwaterforest +// ITANIUM: ret ptr @foo.arch_wildcatlake +// ITANIUM: ret ptr @foo.arch_novalake +// ITANIUM: ret ptr @foo.arch_haswell +// ITANIUM: ret ptr @foo.arch_broadwell +// ITANIUM: ret ptr @foo.arch_skylake // ITANIUM: ret ptr @foo.arch_sandybridge // ITANIUM: ret ptr @foo.arch_ivybridge +// ITANIUM: ret ptr @foo.arch_westmere +// ITANIUM: ret ptr @foo.arch_goldmont +// ITANIUM: ret ptr @foo.arch_goldmont-plus +// ITANIUM: ret ptr @foo.arch_tremont +// ITANIUM: ret ptr @foo.arch_corei7 +// ITANIUM: ret ptr @foo.arch_silvermont +// ITANIUM: ret ptr @foo.arch_slm +// ITANIUM: ret ptr @foo.arch_nehalem // ITANIUM: ret ptr @foo.sse4.2 +// ITANIUM: ret ptr @foo.arch_core2 +// ITANIUM: ret ptr @foo.arch_bonnell +// ITANIUM: ret ptr @foo.arch_atom +// ITANIUM: ret ptr @foo.arch_sapphirerapids +// ITANIUM: ret ptr @foo.arch_graniterapids +// ITANIUM: ret ptr @foo.arch_emeraldrapids +// ITANIUM: ret ptr @foo.arch_graniterapids-d +// ITANIUM: ret ptr @foo.arch_knm // ITANIUM: ret ptr @foo // WINDOWS: define weak_odr dso_local i32 @foo.resolver() #[[ATTR_RESOLVER:[0-9]+]] comdat // WINDOWS: call void @__cpu_indicator_init() -// WINDOWS: call i32 @foo.apxf +// WINDOWS: call i32 @foo.arch_diamondrapids +// WINDOWS: call i32 @foo.arch_tigerlake +// WINDOWS: call i32 @foo.arch_cooperlake +// WINDOWS: call i32 @foo.arch_cascadelake +// WINDOWS: call i32 @foo.arch_icelake-client +// WINDOWS: call i32 @foo.arch_icelake-server +// WINDOWS: call i32 @foo.arch_rocketlake +// WINDOWS: call i32 @foo.arch_cannonlake +// WINDOWS: call i32 @foo.arch_knl +// WINDOWS: call i32 @foo.arch_skylake-avx512 +// WINDOWS: call i32 @foo.arch_alderlake +// WINDOWS: call i32 @foo.arch_raptorlake +// WINDOWS: call i32 @foo.arch_meteorlake +// WINDOWS: call i32 @foo.arch_sierraforest +// WINDOWS: call i32 @foo.arch_grandridge +// WINDOWS: call i32 @foo.arch_arrowlake +// WINDOWS: call i32 @foo.arch_arrowlake-s +// WINDOWS: call i32 @foo.arch_lunarlake +// WINDOWS: call i32 @foo.arch_gracemont +// WINDOWS: call i32 @foo.arch_pantherlake +// WINDOWS: call i32 @foo.arch_clearwaterforest +// WINDOWS: call i32 @foo.arch_wildcatlake +// WINDOWS: call i32 @foo.arch_novalake +// WINDOWS: call i32 @foo.arch_haswell +// WINDOWS: call i32 @foo.arch_broadwell +// WINDOWS: call i32 @foo.arch_skylake // WINDOWS: call i32 @foo.arch_sandybridge // WINDOWS: call i32 @foo.arch_ivybridge +// WINDOWS: call i32 @foo.arch_westmere +// WINDOWS: call i32 @foo.arch_goldmont +// WINDOWS: call i32 @foo.arch_goldmont-plus +// WINDOWS: call i32 @foo.arch_tremont +// WINDOWS: call i32 @foo.arch_corei7 +// WINDOWS: call i32 @foo.arch_silvermont +// WINDOWS: call i32 @foo.arch_slm +// WINDOWS: call i32 @foo.arch_nehalem // WINDOWS: call i32 @foo.sse4.2 +// WINDOWS: call i32 @foo.arch_core2 +// WINDOWS: call i32 @foo.arch_bonnell +// WINDOWS: call i32 @foo.arch_atom +// WINDOWS: call i32 @foo.arch_sapphirerapids +// WINDOWS: call i32 @foo.arch_graniterapids +// WINDOWS: call i32 @foo.arch_emeraldrapids +// WINDOWS: call i32 @foo.arch_graniterapids-d +// WINDOWS: call i32 @foo.arch_knm // WINDOWS: call i32 @foo /// Internal linkage resolvers do not use comdat. diff --git a/clang/test/CodeGen/attr-target-x86-mmx.c b/clang/test/CodeGen/attr-target-x86-mmx.c deleted file mode 100644 index 39b26619475af..0000000000000 --- a/clang/test/CodeGen/attr-target-x86-mmx.c +++ /dev/null @@ -1,21 +0,0 @@ -// RUN: %clang_cc1 -triple i386-linux-gnu -emit-llvm %s -o - | FileCheck %s -// Picking a cpu that doesn't have sse by default so we can enable it later. - -#define __MM_MALLOC_H - -#include <x86intrin.h> - -void __attribute__((target("sse2"))) shift(__m64 a, __m64 b, int c) { - _mm_slli_pi16(a, c); - _mm_slli_pi32(a, c); - _mm_slli_si64(a, c); - - _mm_srli_pi16(a, c); - _mm_srli_pi32(a, c); - _mm_srli_si64(a, c); - - _mm_srai_pi16(a, c); - _mm_srai_pi32(a, c); -} - -// CHECK: "target-features"="+cx8,+mmx,+sse,+sse2,+x87" diff --git a/clang/test/CodeGen/attr-target-x86.c b/clang/test/CodeGen/attr-target-x86.c index 954a508fc6773..f280f3b8b6557 100644 --- a/clang/test/CodeGen/attr-target-x86.c +++ b/clang/test/CodeGen/attr-target-x86.c @@ -30,6 +30,107 @@ // CHECK: define {{.*}}@f_push2pop2({{.*}} [[f_push2pop2:#[0-9]+]] // CHECK: define {{.*}}@f_ppx({{.*}} [[f_ppx:#[0-9]+]] // CHECK: define {{.*}}@f_jmpabs({{.*}} [[f_jmpabs:#[0-9]+]] +// CHECK: define {{.*}}@f_adx({{.*}} [[f_adx:#[0-9]+]] +// CHECK: define {{.*}}@f_aes({{.*}} [[f_aes:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_avx512({{.*}} [[f_amx_avx512:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_bf16({{.*}} [[f_amx_bf16:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_complex({{.*}} [[f_amx_complex:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_fp16({{.*}} [[f_amx_fp16:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_fp8({{.*}} [[f_amx_fp8:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_int8({{.*}} [[f_amx_int8:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_movrs({{.*}} [[f_amx_movrs:#[0-9]+]] +// CHECK: define {{.*}}@f_amx_tile({{.*}} [[f_amx_tile:#[0-9]+]] +// CHECK: define {{.*}}@f_avx10_2({{.*}} [[f_avx10_2:#[0-9]+]] +// CHECK: define {{.*}}@f_avx2({{.*}} [[f_avx2:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512f({{.*}} [[f_avx512f:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512cd({{.*}} [[f_avx512cd:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512vpopcntdq({{.*}} [[f_avx512vpopcntdq:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512vnni({{.*}} [[f_avx512vnni:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512bf16({{.*}} [[f_avx512bf16:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512fp16({{.*}} [[f_avx512fp16:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512dq({{.*}} [[f_avx512dq:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512bitalg({{.*}} [[f_avx512bitalg:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512bmm({{.*}} [[f_avx512bmm:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512bw({{.*}} [[f_avx512bw:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512vl({{.*}} [[f_avx512vl:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512vbmi({{.*}} [[f_avx512vbmi:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512vbmi2({{.*}} [[f_avx512vbmi2:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512ifma({{.*}} [[f_avx512ifma:#[0-9]+]] +// CHECK: define {{.*}}@f_avx512vp2intersect({{.*}} [[f_avx512vp2intersect:#[0-9]+]] +// CHECK: define {{.*}}@f_avxifma({{.*}} [[f_avxifma:#[0-9]+]] +// CHECK: define {{.*}}@f_avxneconvert({{.*}} [[f_avxneconvert:#[0-9]+]] +// CHECK: define {{.*}}@f_avxvnni({{.*}} [[f_avxvnni:#[0-9]+]] +// CHECK: define {{.*}}@f_avxvnniint16({{.*}} [[f_avxvnniint16:#[0-9]+]] +// CHECK: define {{.*}}@f_avxvnniint8({{.*}} [[f_avxvnniint8:#[0-9]+]] +// CHECK: define {{.*}}@f_bmi({{.*}} [[f_bmi:#[0-9]+]] +// CHECK: define {{.*}}@f_bmi2({{.*}} [[f_bmi2:#[0-9]+]] +// CHECK: define {{.*}}@f_cldemote({{.*}} [[f_cldemote:#[0-9]+]] +// CHECK: define {{.*}}@f_clflushopt({{.*}} [[f_clflushopt:#[0-9]+]] +// CHECK: define {{.*}}@f_clwb({{.*}} [[f_clwb:#[0-9]+]] +// CHECK: define {{.*}}@f_clzero({{.*}} [[f_clzero:#[0-9]+]] +// CHECK: define {{.*}}@f_cmpccxadd({{.*}} [[f_cmpccxadd:#[0-9]+]] +// CHECK: define {{.*}}@f_crc32({{.*}} [[f_crc32:#[0-9]+]] +// CHECK: define {{.*}}@f_cx16({{.*}} [[f_cx16:#[0-9]+]] +// CHECK: define {{.*}}@f_enqcmd({{.*}} [[f_enqcmd:#[0-9]+]] +// CHECK: define {{.*}}@f_f16c({{.*}} [[f_f16c:#[0-9]+]] +// CHECK: define {{.*}}@f_fma({{.*}} [[f_fma:#[0-9]+]] +// CHECK: define {{.*}}@f_fma4({{.*}} [[f_fma4:#[0-9]+]] +// CHECK: define {{.*}}@f_fsgsbase({{.*}} [[f_fsgsbase:#[0-9]+]] +// CHECK: define {{.*}}@f_fxsr({{.*}} [[f_fxsr:#[0-9]+]] +// CHECK: define {{.*}}@f_general_regs_only({{.*}} [[f_general_regs_only:#[0-9]+]] +// CHECK: define {{.*}}@f_gfni({{.*}} [[f_gfni:#[0-9]+]] +// CHECK: define {{.*}}@f_hreset({{.*}} [[f_hreset:#[0-9]+]] +// CHECK: define {{.*}}@f_invpcid({{.*}} [[f_invpcid:#[0-9]+]] +// CHECK: define {{.*}}@f_kl({{.*}} [[f_kl:#[0-9]+]] +// CHECK: define {{.*}}@f_widekl({{.*}} [[f_widekl:#[0-9]+]] +// CHECK: define {{.*}}@f_lwp({{.*}} [[f_lwp:#[0-9]+]] +// CHECK: define {{.*}}@f_lzcnt({{.*}} [[f_lzcnt:#[0-9]+]] +// CHECK: define {{.*}}@f_movbe({{.*}} [[f_movbe:#[0-9]+]] +// CHECK: define {{.*}}@f_movrs({{.*}} [[f_movrs:#[0-9]+]] +// CHECK: define {{.*}}@f_movdiri({{.*}} [[f_movdiri:#[0-9]+]] +// CHECK: define {{.*}}@f_movdir64b({{.*}} [[f_movdir64b:#[0-9]+]] +// CHECK: define {{.*}}@f_mwaitx({{.*}} [[f_mwaitx:#[0-9]+]] +// CHECK: define {{.*}}@f_pclmul({{.*}} [[f_pclmul:#[0-9]+]] +// CHECK: define {{.*}}@f_pconfig({{.*}} [[f_pconfig:#[0-9]+]] +// CHECK: define {{.*}}@f_pku({{.*}} [[f_pku:#[0-9]+]] +// CHECK: define {{.*}}@f_popcnt({{.*}} [[f_popcnt:#[0-9]+]] +// CHECK: define {{.*}}@f_prefetchi({{.*}} [[f_prefetchi:#[0-9]+]] +// CHECK: define {{.*}}@f_prfchw({{.*}} [[f_prfchw:#[0-9]+]] +// CHECK: define {{.*}}@f_ptwrite({{.*}} [[f_ptwrite:#[0-9]+]] +// CHECK: define {{.*}}@f_raoint({{.*}} [[f_raoint:#[0-9]+]] +// CHECK: define {{.*}}@f_rdpid({{.*}} [[f_rdpid:#[0-9]+]] +// CHECK: define {{.*}}@f_rdpru({{.*}} [[f_rdpru:#[0-9]+]] +// CHECK: define {{.*}}@f_rdrnd({{.*}} [[f_rdrnd:#[0-9]+]] +// CHECK: define {{.*}}@f_rdseed({{.*}} [[f_rdseed:#[0-9]+]] +// CHECK: define {{.*}}@f_rtm({{.*}} [[f_rtm:#[0-9]+]] +// CHECK: define {{.*}}@f_sahf({{.*}} [[f_sahf:#[0-9]+]] +// CHECK: define {{.*}}@f_serialize({{.*}} [[f_serialize:#[0-9]+]] +// CHECK: define {{.*}}@f_sgx({{.*}} [[f_sgx:#[0-9]+]] +// CHECK: define {{.*}}@f_sha({{.*}} [[f_sha:#[0-9]+]] +// CHECK: define {{.*}}@f_sha512({{.*}} [[f_sha512:#[0-9]+]] +// CHECK: define {{.*}}@f_shstk({{.*}} [[f_shstk:#[0-9]+]] +// CHECK: define {{.*}}@f_sm3({{.*}} [[f_sm3:#[0-9]+]] +// CHECK: define {{.*}}@f_sm4({{.*}} [[f_sm4:#[0-9]+]] +// CHECK: define {{.*}}@f_sse({{.*}} [[f_sse:#[0-9]+]] +// CHECK: define {{.*}}@f_sse2({{.*}} [[f_sse2:#[0-9]+]] +// CHECK: define {{.*}}@f_sse3({{.*}} [[f_sse3:#[0-9]+]] +// CHECK: define {{.*}}@f_ssse3({{.*}} [[f_ssse3:#[0-9]+]] +// CHECK: define {{.*}}@f_sse4_1({{.*}} [[f_sse4_1:#[0-9]+]] +// CHECK: define {{.*}}@f_sse4a({{.*}} [[f_sse4a:#[0-9]+]] +// CHECK: define {{.*}}@f_tbm({{.*}} [[f_tbm:#[0-9]+]] +// CHECK: define {{.*}}@f_tsxldtrk({{.*}} [[f_tsxldtrk:#[0-9]+]] +// CHECK: define {{.*}}@f_uintr({{.*}} [[f_uintr:#[0-9]+]] +// CHECK: define {{.*}}@f_usermsr({{.*}} [[f_usermsr:#[0-9]+]] +// CHECK: define {{.*}}@f_vaes({{.*}} [[f_vaes:#[0-9]+]] +// CHECK: define {{.*}}@f_vpclmulqdq({{.*}} [[f_vpclmulqdq:#[0-9]+]] +// CHECK: define {{.*}}@f_wbnoinvd({{.*}} [[f_wbnoinvd:#[0-9]+]] +// CHECK: define {{.*}}@f_waitpkg({{.*}} [[f_waitpkg:#[0-9]+]] +// CHECK: define {{.*}}@f_x87({{.*}} [[f_default]] +// CHECK: define {{.*}}@f_xop({{.*}} [[f_xop:#[0-9]+]] +// CHECK: define {{.*}}@f_xsave({{.*}} [[f_xsave:#[0-9]+]] +// CHECK: define {{.*}}@f_xsavec({{.*}} [[f_xsavec:#[0-9]+]] +// CHECK: define {{.*}}@f_xsaves({{.*}} [[f_xsaves:#[0-9]+]] +// CHECK: define {{.*}}@f_xsaveopt({{.*}} [[f_xsaveopt:#[0-9]+]] // CHECK: [[f_default]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="i686" void f_default(void) {} @@ -163,3 +264,508 @@ void f_ppx(void) {} // CHECK: [[f_jmpabs]] = {{.*}}"target-features"="{{.*}}+jmpabs __attribute__((target("jmpabs"))) void f_jmpabs(void) {} + +// CHECK: [[f_adx]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+adx,+cmov,+cx8,+x87" +__attribute__((target("adx"))) +void f_adx(void) {} + +// CHECK: [[f_aes]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+aes,+cmov,+cx8,+mmx,+sse,+sse2,+x87" +__attribute__((target("aes"))) +void f_aes(void) {} + +// CHECK: [[f_amx_avx512]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-avx512,+amx-tile,+avx,+avx10.1,+avx10.2,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" +__attribute__((target("amx-avx512"))) +void f_amx_avx512(void) {} + +// CHECK: [[f_amx_bf16]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-bf16,+amx-tile,+cmov,+cx8,+x87" +__attribute__((target("amx-bf16"))) +void f_amx_bf16(void) {} + +// CHECK: [[f_amx_complex]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-complex,+amx-tile,+cmov,+cx8,+x87" +__attribute__((target("amx-complex"))) +void f_amx_complex(void) {} + +// CHECK: [[f_amx_fp16]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-fp16,+amx-tile,+cmov,+cx8,+x87" +__attribute__((target("amx-fp16"))) +void f_amx_fp16(void) {} + +// CHECK: [[f_amx_fp8]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-fp8,+amx-tile,+cmov,+cx8,+x87" +__attribute__((target("amx-fp8"))) +void f_amx_fp8(void) {} + +// CHECK: [[f_amx_int8]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-int8,+amx-tile,+cmov,+cx8,+x87" +__attribute__((target("amx-int8"))) +void f_amx_int8(void) {} + +// CHECK: [[f_amx_movrs]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-movrs,+amx-tile,+cmov,+cx8,+x87" +__attribute__((target("amx-movrs"))) +void f_amx_movrs(void) {} + +// CHECK: [[f_amx_tile]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+amx-tile,+cmov,+cx8,+x87" +__attribute__((target("amx-tile"))) +void f_amx_tile(void) {} + +// CHECK: [[f_avx10_2]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+avx,+avx10.1,+avx10.2,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" +__attribute__((target("avx10.2"))) +void f_avx10_2(void) {} + +// CHECK: [[f_avx2]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+avx,+avx2,+cmov,+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" +__attribute__((target("avx2"))) +void f_avx2(void) {} + +// CHECK: [[f_avx512f]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+avx,+avx2,+avx512f,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" +__attribute__((target("avx512f"))) +void f_avx512f(void) {} + +// CHECK: [[f_avx512cd]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+avx,+avx2,+avx512cd,+avx512f,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" +__attribute__((target("avx512cd"))) +void f_avx512cd(void) {} + +// CHECK: [[f_avx512vpopcntdq]] = {{.*}}"target-cpu"="i686" +// CHECK-SAME: "target-features"="+avx,+avx2,+avx512f,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" +__attribute__((target("avx512vpopcntdq"))) +void f_avx512vpopcntdq(void) {} + +// CHECK: [[f_avx512vnni]] = {{.*}}"target-cpu"="... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/218697 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
