================
@@ -0,0 +1,74 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)'
-mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s
--check-prefixes=CHECK,AVX2
+; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)'
-mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s
--check-prefixes=CHECK,SSE2
+
+define i8 @hoist_bitcast_i256_to_v32i8(ptr %a0) {
+; AVX2-LABEL: @hoist_bitcast_i256_to_v32i8(
+; AVX2-NEXT: entry:
+; AVX2-NEXT: [[SRC256:%.*]] = load i256, ptr [[A0:%.*]], align 1
+; AVX2-NEXT: [[SRC256_BITCAST:%.*]] = bitcast i256 [[SRC256]] to <32 x i8>
+; AVX2-NEXT: [[ISZERO:%.*]] = icmp eq i256 [[SRC256]], 0
+; AVX2-NEXT: br i1 [[ISZERO]], label [[EXIT:%.*]], label [[REDUCTION:%.*]]
+; AVX2: reduction:
+; AVX2-NEXT: [[RED:%.*]] = call i8 @llvm.vector.reduce.umax.v32i8(<32 x i8>
[[SRC256_BITCAST]])
+; AVX2-NEXT: br label [[EXIT]]
+; AVX2: exit:
+; AVX2-NEXT: [[RESULT:%.*]] = phi i8 [ 0, [[ENTRY:%.*]] ], [ [[RED]],
[[REDUCTION]] ]
+; AVX2-NEXT: ret i8 [[RESULT]]
+;
+; SSE2-LABEL: @hoist_bitcast_i256_to_v32i8(
+; SSE2-NEXT: entry:
+; SSE2-NEXT: [[SRC256:%.*]] = load i256, ptr [[A0:%.*]], align 1
+; SSE2-NEXT: [[ISZERO:%.*]] = icmp eq i256 [[SRC256]], 0
+; SSE2-NEXT: br i1 [[ISZERO]], label [[EXIT:%.*]], label [[REDUCTION:%.*]]
+; SSE2: reduction:
+; SSE2-NEXT: [[SRC256_BITCAST:%.*]] = bitcast i256 [[SRC256]] to <32 x i8>
----------------
RKSimon wrote:
Shouldn't this still hoist? i256 will spill to 4 x i64 but v32i8 will use 2 x
v16i8
https://github.com/llvm/llvm-project/pull/207568
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