================
@@ -737,3 +737,610 @@ vfloat4 test_builtin_elementwise_fma(vfloat4 a, vfloat4 
b, vfloat4 c) {
   // LLVM: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
   return __builtin_elementwise_fma(a, b, c);
 }
+
+typedef _Float16 half;
+typedef half half2 __attribute__((ext_vector_type(2)));
+typedef float float2 __attribute__((ext_vector_type(2)));
+typedef float float4 __attribute__((ext_vector_type(4)));
+typedef short int si8 __attribute__((ext_vector_type(8)));
+typedef int int4 __attribute__((ext_vector_type(4)));
+typedef unsigned int u4 __attribute__((ext_vector_type(4)));
+typedef double double2 __attribute__((ext_vector_type(2)));
+typedef double double3 __attribute__((ext_vector_type(3)));
+__attribute__((address_space(1))) int int_as_one;
+typedef int bar;
+bar b;
+
+void test_builtin_elementwise_min(float f1, float f2, double d1, double d2,
+                                  float4 vf1, float4 vf2, long long int i1,
+                                  long long int i2, si8 vi1, si8 vi2,
+                                  unsigned u1, unsigned u2, u4 vu1, u4 vu2,
+                                  _BitInt(31) bi1, _BitInt(31) bi2,
+                                  unsigned _BitInt(55) bu1, unsigned 
_BitInt(55) bu2) {
+  // CIR-LABEL: @test_builtin_elementwise_min
+  // LLVM-LABEL: @test_builtin_elementwise_min(
+
+  // CIR: %[[F1:.*]] = cir.alloca "f1" align(4) init : !cir.ptr<!cir.float>
+  // CIR: %[[F2:.*]] = cir.alloca "f2" align(4) init : !cir.ptr<!cir.float>
+  // CIR: %[[D1:.*]] = cir.alloca "d1" align(8) init : !cir.ptr<!cir.double>
+  // CIR: %[[D2:.*]] = cir.alloca "d2" align(8) init : !cir.ptr<!cir.double>
+  // CIR: %[[VF1:.*]] = cir.alloca "vf1" align(16) init : 
!cir.ptr<!cir.vector<4 x !cir.float>>
+  // CIR: %[[VF2:.*]] = cir.alloca "vf2" align(16) init : 
!cir.ptr<!cir.vector<4 x !cir.float>>
+  // CIR: %[[I1:.*]] = cir.alloca "i1" align(8) init : !cir.ptr<!s64i>
+  // CIR: %[[I2:.*]] = cir.alloca "i2" align(8) init : !cir.ptr<!s64i>
+  // CIR: %[[VI1:.*]] = cir.alloca "vi1" align(16) init : 
!cir.ptr<!cir.vector<8 x !s16i>>
+  // CIR: %[[VI2:.*]] = cir.alloca "vi2" align(16) init : 
!cir.ptr<!cir.vector<8 x !s16i>>
+  // CIR: %[[U1:.*]] = cir.alloca "u1" align(4) init : !cir.ptr<!u32i>
+  // CIR: %[[U2:.*]] = cir.alloca "u2" align(4) init : !cir.ptr<!u32i>
+  // CIR: %[[VU1:.*]] = cir.alloca "vu1" align(16) init : 
!cir.ptr<!cir.vector<4 x !u32i>>
+  // CIR: %[[VU2:.*]] = cir.alloca "vu2" align(16) init : 
!cir.ptr<!cir.vector<4 x !u32i>>
+  // CIR: %[[BI1:.*]] = cir.alloca "bi1" align(4) init : !cir.ptr<!cir.int<s, 
31, bitint>>
+  // CIR: %[[BI2:.*]] = cir.alloca "bi2" align(4) init : !cir.ptr<!cir.int<s, 
31, bitint>>
+  // CIR: %[[BU1:.*]] = cir.alloca "bu1" align(8) init : !cir.ptr<!cir.int<u, 
55, bitint>>
+  // CIR: %[[BU2:.*]] = cir.alloca "bu2" align(8) init : !cir.ptr<!cir.int<u, 
55, bitint>>
+  // CIR: %[[CVF1:.*]] = cir.alloca "cvf1" align(16) init const : 
!cir.ptr<!cir.vector<4 x !cir.float>>
+
+  // LLVM: %[[ADDR_F1:.*]] = alloca float, align 4
+  // LLVM: %[[ADDR_F2:.*]] = alloca float, align 4
+  // LLVM: %[[ADDR_D1:.*]] = alloca double, align 8
+  // LLVM: %[[ADDR_D2:.*]] = alloca double, align 8
+  // LLVM: %[[ADDR_VF1:.*]] = alloca <4 x float>, align 16
+  // LLVM: %[[ADDR_VF2:.*]] = alloca <4 x float>, align 16
+  // LLVM: %[[ADDR_I1:.*]] = alloca i64, align 8
+  // LLVM: %[[ADDR_I2:.*]] = alloca i64, align 8
+  // LLVM: %[[ADDR_VI1:.*]] = alloca <8 x i16>, align 16
+  // LLVM: %[[ADDR_VI2:.*]] = alloca <8 x i16>, align 16
+  // LLVM: %[[ADDR_U1:.*]] = alloca i32, align 4
+  // LLVM: %[[ADDR_U2:.*]] = alloca i32, align 4
+  // LLVM: %[[ADDR_VU1:.*]] = alloca <4 x i32>, align 16
+  // LLVM: %[[ADDR_VU2:.*]] = alloca <4 x i32>, align 16
+  // LLVM: %[[ADDR_BI1:.*]] = alloca i32, align 4
+  // LLVM: %[[ADDR_BI2:.*]] = alloca i32, align 4
+  // LLVM: %[[ADDR_BU1:.*]] = alloca i64, align 8
+  // LLVM: %[[ADDR_BU2:.*]] = alloca i64, align 8
+  // LLVM: %[[ADDR_CVF1:.*]] = alloca <4 x float>, align 16
+
+  // CIR:      %[[F1_LOAD:.*]] = cir.load align(4) %[[F1]] : 
!cir.ptr<!cir.float>, !cir.float
+  // CIR-NEXT: %[[F2_LOAD:.*]] = cir.load align(4) %[[F2]] : 
!cir.ptr<!cir.float>, !cir.float
+  // CIR-NEXT: cir.call_llvm_intrinsic "minnum" %[[F1_LOAD]], %[[F2_LOAD]] : 
(!cir.float, !cir.float) -> !cir.float
+
+  // LLVM:      [[F1:%.+]] = load float, ptr %[[ADDR_F1]], align 4
+  // LLVM-NEXT: [[F2:%.+]] = load float, ptr %[[ADDR_F2]], align 4
+  // LLVM-NEXT:  call float @llvm.minnum.f32(float [[F1]], float [[F2]])
+  f1 = __builtin_elementwise_min(f1, f2);
+
+  // CIR:      %[[D1_LOAD:.*]] = cir.load align(8) %[[D1]] : 
!cir.ptr<!cir.double>, !cir.double
+  // CIR-NEXT: %[[D2_LOAD:.*]] = cir.load align(8) %[[D2]] : 
!cir.ptr<!cir.double>, !cir.double
+  // CIR-NEXT: cir.call_llvm_intrinsic "minnum" %[[D1_LOAD]], %[[D2_LOAD]] : 
(!cir.double, !cir.double) -> !cir.double
+
+  // LLVM:      [[D1:%.+]] = load double, ptr %[[ADDR_D1]], align 8
+  // LLVM-NEXT: [[D2:%.+]] = load double, ptr %[[ADDR_D2]], align 8
+  // LLVM-NEXT: call double @llvm.minnum.f64(double [[D1]], double [[D2]])
+  d1 = __builtin_elementwise_min(d1, d2);
+
+  // CIR:      %[[D1_LOAD:.*]] = cir.load align(8) %[[D1]] : 
!cir.ptr<!cir.double>, !cir.double
+  // CIR-NEXT: %[[TWO:.*]] = cir.const #cir.fp<2.000000e+00> : !cir.double
+  // CIR-NEXT: cir.call_llvm_intrinsic "minnum" %[[D1_LOAD]], %[[TWO]] : 
(!cir.double, !cir.double) -> !cir.double
+ 
+  // LLVM:      [[D1:%.+]] = load double, ptr %[[ADDR_D1]], align 8
+  // LLVM-NEXT: call double @llvm.minnum.f64(double [[D1]], double 
2.000000e+00)
+  d1 = __builtin_elementwise_min(d1, 2.0);
+
+  // CIR:      %[[VF1_LOAD:.*]] = cir.load align(16) %[[VF1]] : 
!cir.ptr<!cir.vector<4 x !cir.float>>, !cir.vector<4 x !cir.float>
+  // CIR-NEXT: %[[VF2_LOAD:.*]] = cir.load align(16) %[[VF2]] : 
!cir.ptr<!cir.vector<4 x !cir.float>>, !cir.vector<4 x !cir.float>
+  // CIR-NEXT: cir.call_llvm_intrinsic "minnum" %[[VF1_LOAD]], %[[VF2_LOAD]] : 
(!cir.vector<4 x !cir.float>, !cir.vector<4 x !cir.float>) -> !cir.vector<4 x 
!cir.float>
+
+  // LLVM:      [[VF1:%.+]] = load <4 x float>, ptr %[[ADDR_VF1]], align 16
+  // LLVM-NEXT: [[VF2:%.+]] = load <4 x float>, ptr %[[ADDR_VF2]], align 16
+  // LLVM-NEXT: call <4 x float> @llvm.minnum.v4f32(<4 x float> [[VF1]], <4 x 
float> [[VF2]])
+  vf1 = __builtin_elementwise_min(vf1, vf2);
+
+  // CIR:      %[[I1_LOAD:.*]] = cir.load align(8) %[[I1]] : !cir.ptr<!s64i>, 
!s64i
+  // CIR-NEXT: %[[I2_LOAD:.*]] = cir.load align(8) %[[I2]] : !cir.ptr<!s64i>, 
!s64i
+  // CIR-NEXT: cir.call_llvm_intrinsic "smin" %31, %32 : (!s64i, !s64i) -> 
!s64i
----------------
erichkeane wrote:

oof, good catch, thank you!

https://github.com/llvm/llvm-project/pull/222481
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