================
@@ -0,0 +1,909 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown 
--show-mc-encoding -mattr=+avx10v2aux | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown 
--show-mc-encoding -mattr=+avx10v2aux | FileCheck %s --check-prefix=X86
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtps2bf8128(<4 x float> %b, <16 x 
i8> %src0, i8 %mask) {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtps2bf8128:
+; X64:       # %bb.0:
+; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT:    vcvtps2bf8 %xmm0, %xmm1 {%k1} # encoding: 
[0x62,0xf5,0x7e,0x09,0x39,0xc8]
+; X64-NEXT:    vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: 
[0xc5,0xf8,0x28,0xc1]
+; X64-NEXT:    retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtps2bf8128:
+; X86:       # %bb.0:
+; X86-NEXT:    kmovb {{[0-9]+}}(%esp), %k1 # encoding: 
[0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT:    vcvtps2bf8 %xmm0, %xmm1 {%k1} # encoding: 
[0x62,0xf5,0x7e,0x09,0x39,0xc8]
+; X86-NEXT:    vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: 
[0xc5,0xf8,0x28,0xc1]
+; X86-NEXT:    retl # encoding: [0xc3]
+  %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtps2bf8128(<4 x float> %b, <16 
x i8> %src0, i8 %mask)
+  ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtps2bf8128(<4 x float> %b, i8 
%mask) {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtps2bf8128:
+; X64:       # %bb.0:
+; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT:    vcvtps2bf8 %xmm0, %xmm0 {%k1} {z} # encoding: 
[0x62,0xf5,0x7e,0x89,0x39,0xc0]
+; X64-NEXT:    retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtps2bf8128:
+; X86:       # %bb.0:
+; X86-NEXT:    kmovb {{[0-9]+}}(%esp), %k1 # encoding: 
[0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT:    vcvtps2bf8 %xmm0, %xmm0 {%k1} {z} # encoding: 
[0x62,0xf5,0x7e,0x89,0x39,0xc0]
+; X86-NEXT:    retl # encoding: [0xc3]
+  %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtps2bf8128(<4 x float> %b, <16 
x i8> zeroinitializer, i8 %mask)
----------------
e-kud wrote:

Yeah, I faced with the same issue recently that we need new pattern to get rid 
of `_mask` versions for `z` and generic mask when higher bits are zeroed. Ok 
for now.

https://github.com/llvm/llvm-project/pull/206888
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