================
@@ -0,0 +1,62 @@
+//===-- IntelGPUTargetParser - Parser for Intel GPU targets 
---------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements a target parser for the Intel GPU list.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/TargetParser/IntelGPUTargetParser.h"
+#include "llvm/ADT/Twine.h"
+
+using namespace llvm;
+using namespace IntelGPU;
+
+// A GPU IP version packs four fields, from the most significant bit down:
+//
+//    31           22 21      14 13       6 5        0
+//   +---------------+----------+----------+----------+
+//   |  architecture |  release | reserved | revision |
+//   +---------------+----------+----------+----------+
+//        10 bits      8 bits     8 bits     6 bits
+//
+// The reserved bits carry no information.
+static constexpr uint32_t GPUIPArchitectureShift = 22;
+static constexpr uint32_t GPUIPReleaseShift = 14;
+static constexpr uint32_t GPUIPReleaseMask = 0xff;
+static constexpr uint32_t GPUIPRevisionMask = 0x3f;
+
+// The bits that identify a device: the architecture and the release. Neither
+// the revision nor the reserved bits take part in the lookup, because every
+// stepping of a release is one device as far as the compiler is concerned.
+static constexpr uint32_t GPUIPDeviceMask = ~0u << GPUIPReleaseShift;
+
+// Pack an architecture and a release the way a GPU IP version does, so that a
+// row of the table can be compared against a reported version as it is.
+static constexpr uint32_t packDevice(uint32_t Architecture, uint32_t Release) {
+  return (Architecture << GPUIPArchitectureShift) |
+         (Release << GPUIPReleaseShift);
----------------
tahonermann wrote:

If `Release` has a value that cannot be held in 8 bits, then it will affect the 
`Architecture` bits. That seems worth an assertion.
```suggestion
  assert(Release & ~GPUIPReleaseMask == 0);
  return (Architecture << GPUIPArchitectureShift) |
         (Release << GPUIPReleaseShift);
```

https://github.com/llvm/llvm-project/pull/222072
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