Author: Craig Topper
Date: 2026-09-23T21:12:39-07:00
New Revision: 38dcabc41cec041b91be72a4733d571c18c80c6e

URL: 
https://github.com/llvm/llvm-project/commit/38dcabc41cec041b91be72a4733d571c18c80c6e
DIFF: 
https://github.com/llvm/llvm-project/commit/38dcabc41cec041b91be72a4733d571c18c80c6e.diff

LOG: [RISCV][P-Ext] Remove builtins for pmerge with signed types. (#225975)

We can use the unsigned builtins to implement the signed intrinsics.

Added: 
    

Modified: 
    clang/include/clang/Basic/BuiltinsRISCV.td
    clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
    clang/lib/Headers/riscv_packed_simd.h

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Basic/BuiltinsRISCV.td 
b/clang/include/clang/Basic/BuiltinsRISCV.td
index b230ea5f8188f..4cc4cc2169f01 100644
--- a/clang/include/clang/Basic/BuiltinsRISCV.td
+++ b/clang/include/clang/Basic/BuiltinsRISCV.td
@@ -235,17 +235,12 @@ def predsumu_u32x2_u64 : 
RISCVBuiltin<"uint64_t(_Vector<2, unsigned int>, uint64
 
 // Packed Merge (32-bit)
 def pmerge_u8x4 : RISCVBuiltin<"_Vector<4, unsigned char>(_Vector<4, unsigned 
char>, _Vector<4, unsigned char>, _Vector<4, unsigned char>)">;
-def pmerge_i8x4 : RISCVBuiltin<"_Vector<4, signed char>(_Vector<4, signed 
char>, _Vector<4, signed char>, _Vector<4, unsigned char>)">;
 def pmerge_u16x2 : RISCVBuiltin<"_Vector<2, unsigned short>(_Vector<2, 
unsigned short>, _Vector<2, unsigned short>, _Vector<2, unsigned short>)">;
-def pmerge_i16x2 : RISCVBuiltin<"_Vector<2, short>(_Vector<2, short>, 
_Vector<2, short>, _Vector<2, unsigned short>)">;
 
 // Packed Merge (64-bit)
 def pmerge_u8x8 : RISCVBuiltin<"_Vector<8, unsigned char>(_Vector<8, unsigned 
char>, _Vector<8, unsigned char>, _Vector<8, unsigned char>)">;
-def pmerge_i8x8 : RISCVBuiltin<"_Vector<8, signed char>(_Vector<8, signed 
char>, _Vector<8, signed char>, _Vector<8, unsigned char>)">;
 def pmerge_u16x4 : RISCVBuiltin<"_Vector<4, unsigned short>(_Vector<4, 
unsigned short>, _Vector<4, unsigned short>, _Vector<4, unsigned short>)">;
-def pmerge_i16x4 : RISCVBuiltin<"_Vector<4, short>(_Vector<4, short>, 
_Vector<4, short>, _Vector<4, unsigned short>)">;
 def pmerge_u32x2 : RISCVBuiltin<"_Vector<2, unsigned int>(_Vector<2, unsigned 
int>, _Vector<2, unsigned int>, _Vector<2, unsigned int>)">;
-def pmerge_i32x2 : RISCVBuiltin<"_Vector<2, int>(_Vector<2, int>, _Vector<2, 
int>, _Vector<2, unsigned int>)">;
 
 // Packed Multiply High (32-bit)
 def pmulh_i16x2 : RISCVBuiltin<"_Vector<2, short>(_Vector<2, short>, 
_Vector<2, short>)">;

diff  --git a/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp 
b/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
index 7824b2b0c431e..dc44fd06e035a 100644
--- a/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
@@ -1250,15 +1250,10 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   case RISCV::BI__builtin_riscv_pabdu_u16x4:
   // Packed Merge
   case RISCV::BI__builtin_riscv_pmerge_u8x4:
-  case RISCV::BI__builtin_riscv_pmerge_i8x4:
   case RISCV::BI__builtin_riscv_pmerge_u16x2:
-  case RISCV::BI__builtin_riscv_pmerge_i16x2:
   case RISCV::BI__builtin_riscv_pmerge_u8x8:
-  case RISCV::BI__builtin_riscv_pmerge_i8x8:
   case RISCV::BI__builtin_riscv_pmerge_u16x4:
-  case RISCV::BI__builtin_riscv_pmerge_i16x4:
   case RISCV::BI__builtin_riscv_pmerge_u32x2:
-  case RISCV::BI__builtin_riscv_pmerge_i32x2:
   // Packed Multiply High
   case RISCV::BI__builtin_riscv_pmulh_i16x2:
   case RISCV::BI__builtin_riscv_pmulh_i16x4:
@@ -1410,15 +1405,10 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
       ID = Intrinsic::riscv_pabdu;
       break;
     case RISCV::BI__builtin_riscv_pmerge_u8x4:
-    case RISCV::BI__builtin_riscv_pmerge_i8x4:
     case RISCV::BI__builtin_riscv_pmerge_u16x2:
-    case RISCV::BI__builtin_riscv_pmerge_i16x2:
     case RISCV::BI__builtin_riscv_pmerge_u8x8:
-    case RISCV::BI__builtin_riscv_pmerge_i8x8:
     case RISCV::BI__builtin_riscv_pmerge_u16x4:
-    case RISCV::BI__builtin_riscv_pmerge_i16x4:
     case RISCV::BI__builtin_riscv_pmerge_u32x2:
-    case RISCV::BI__builtin_riscv_pmerge_i32x2:
       ID = Intrinsic::riscv_pmerge;
       break;
     case RISCV::BI__builtin_riscv_pmulh_i16x2:

diff  --git a/clang/lib/Headers/riscv_packed_simd.h 
b/clang/lib/Headers/riscv_packed_simd.h
index 652dab807ac2d..99a6f7b1d6e9f 100644
--- a/clang/lib/Headers/riscv_packed_simd.h
+++ b/clang/lib/Headers/riscv_packed_simd.h
@@ -924,17 +924,17 @@ __packed_reduction(predsumu_u32x2_u64, uint64_t, 
uint32x2_t, __builtin_riscv_pre
 
 /* Packed Merge (32-bit) */
 __packed_merge_builtin(pmerge_u8x4, uint8x4_t, uint8x4_t, 
__builtin_riscv_pmerge_u8x4)
-__packed_merge_builtin(pmerge_i8x4, int8x4_t, uint8x4_t, 
__builtin_riscv_pmerge_i8x4)
+__packed_merge_builtin(pmerge_i8x4, int8x4_t, uint8x4_t, 
__builtin_riscv_pmerge_u8x4)
 __packed_merge_builtin(pmerge_u16x2, uint16x2_t, uint16x2_t, 
__builtin_riscv_pmerge_u16x2)
-__packed_merge_builtin(pmerge_i16x2, int16x2_t, uint16x2_t, 
__builtin_riscv_pmerge_i16x2)
+__packed_merge_builtin(pmerge_i16x2, int16x2_t, uint16x2_t, 
__builtin_riscv_pmerge_u16x2)
 
 /* Packed Merge (64-bit) */
 __packed_merge_builtin(pmerge_u8x8, uint8x8_t, uint8x8_t, 
__builtin_riscv_pmerge_u8x8)
-__packed_merge_builtin(pmerge_i8x8, int8x8_t, uint8x8_t, 
__builtin_riscv_pmerge_i8x8)
+__packed_merge_builtin(pmerge_i8x8, int8x8_t, uint8x8_t, 
__builtin_riscv_pmerge_u8x8)
 __packed_merge_builtin(pmerge_u16x4, uint16x4_t, uint16x4_t, 
__builtin_riscv_pmerge_u16x4)
-__packed_merge_builtin(pmerge_i16x4, int16x4_t, uint16x4_t, 
__builtin_riscv_pmerge_i16x4)
+__packed_merge_builtin(pmerge_i16x4, int16x4_t, uint16x4_t, 
__builtin_riscv_pmerge_u16x4)
 __packed_merge_builtin(pmerge_u32x2, uint32x2_t, uint32x2_t, 
__builtin_riscv_pmerge_u32x2)
-__packed_merge_builtin(pmerge_i32x2, int32x2_t, uint32x2_t, 
__builtin_riscv_pmerge_i32x2)
+__packed_merge_builtin(pmerge_i32x2, int32x2_t, uint32x2_t, 
__builtin_riscv_pmerge_u32x2)
 
 /* Packed Multiply High (32-bit) */
 __packed_binary_builtin(pmulh_i16x2, int16x2_t, __builtin_riscv_pmulh_i16x2)


        
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