================
@@ -44,3 +48,72 @@ define void @_start() {
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"target-abi", !"lp64d"}
+
+;--- fn-inline-asm-no-ext.ll
+;; Function-level inline asm without +d on the function emits the missing D
+;; note once from RISCVSubtarget, without re-validating target-abi in
RISCVAsmParser.
+; RUN: llvm-as %t/fn-inline-asm-no-ext.ll -o %t/fn-inline-asm-no-ext.bc
+; RUN: ld.lld -shared %t/fn-inline-asm-no-ext.bc -o %t/fn-inline-asm-no-ext.so
2>&1 | FileCheck %s --check-prefix=WARN \
+; RUN: --implicit-check-not="ignoring target-abi"
--implicit-check-not="error:" --implicit-check-not="warning:"
+
+target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
----------------
topperc wrote:
This isn't the target datalayout for riscv64. The n64 should be n32:64
https://github.com/llvm/llvm-project/pull/225129
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