================ @@ -0,0 +1,97 @@ +// REQUIRES: amdgpu-registered-target +// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -x hip -fcuda-is-device -fclangir -emit-cir %s -o - \ +// RUN: | FileCheck --check-prefix=CIR-SPV %s +// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -x hip -fcuda-is-device -fclangir -emit-llvm %s -o - \ +// RUN: | FileCheck --check-prefix=LLVM-SPV %s +// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -x hip -fcuda-is-device -emit-llvm %s -o - \ +// RUN: | FileCheck --check-prefix=OGCG-SPV %s + +// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x hip -fcuda-is-device -fclangir -emit-cir %s -o - \ +// RUN: | FileCheck --check-prefix=CIR-GCN %s +// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x hip -fcuda-is-device -fclangir -emit-llvm %s -o - \ +// RUN: | FileCheck --check-prefix=LLVM-GCN %s +// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x hip -fcuda-is-device -emit-llvm %s -o - \ +// RUN: | FileCheck --check-prefix=OGCG-GCN %s + +// String literals are emitted in the target's constant address space for +// globals (CrossWorkgroup on SPIR-V, constant on AMDGCN) and are referenced ---------------- Fznamznon wrote:
> CrossWorkgroup on SPIR-V But that is special SPIR-V for amd. IIRC SPIR-V has constant address space which is not `CrossWorkgroup`. I suppose we will see it for OpenCL and non-amd SPIR-V. I wonder if we need an OpenCL test for this patch? https://github.com/llvm/llvm-project/pull/226996 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
