================
@@ -3433,11 +3433,38 @@ bool SPIRVInstructionSelector::selectOpIsNan(Register 
ResVReg,
 bool SPIRVInstructionSelector::selectOpIsFinite(Register ResVReg,
                                                 SPIRVTypeInst ResType,
                                                 MachineInstr &I) const {
+  // OpIsFinite requires Kernel capability; emulate with OpIsInf & OpIsNan
----------------
danbrown-amd wrote:

Awaiting guidance.

https://github.com/llvm/llvm-project/pull/225947
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