================
@@ -71,6 +93,107 @@ static mlir::Value emitAMDGPUGridSize(CIRGenFunction &cgf,
mlir::Location loc,
builder.getUInt32Ty(), CharUnits::fromQuantity(4));
}
+static mlir::Value emitAMDGPUWorkGroupSizeV5(CIRGenFunction &cgf,
+ mlir::Location loc,
+ unsigned index) {
+ CIRGenBuilderTy &builder = cgf.getBuilder();
+ mlir::Value implicitArgPtr = emitAMDGPUImplicitArgPtr(cgf, loc);
+
+ // offsetof(amdhsa_implicit_kernarg_v5, block_count[index])
+ unsigned blockCountOffset = 0 + index * 4;
+ // offsetof(amdhsa_implicit_kernarg_v5, group_size[index])
+ unsigned groupSizeOffset = 12 + index * 2;
+ // offsetof(amdhsa_implicit_kernarg_v5, remainder[index])
+ unsigned remainderOffset = 18 + index * 2;
+
+ mlir::Value sizeOffset;
+ if (cgf.getLangOpts().OffloadUniformBlock) {
+ sizeOffset = builder.getUInt64(groupSizeOffset, loc);
+ } else {
+ mlir::Value blockCount = emitAMDGPUInvariantLoad(
+ cgf, loc, implicitArgPtr, builder.getUInt64(blockCountOffset, loc),
+ builder.getUInt32Ty(), CharUnits::fromQuantity(4));
+ mlir::Value workgroupID = emitAMDGPUWorkGroupID(cgf, loc, index);
+ mlir::Value isFull =
+ builder.createCompare(loc, cir::CmpOpKind::lt, workgroupID,
blockCount);
+ sizeOffset = builder.createSelect(loc, isFull,
+ builder.getUInt64(groupSizeOffset, loc),
+ builder.getUInt64(remainderOffset, loc));
+ }
+
+ mlir::Value size = emitAMDGPUInvariantLoad(cgf, loc, implicitArgPtr,
+ sizeOffset, builder.getUInt16Ty(),
+ CharUnits::fromQuantity(2));
+ return builder.createIntCast(size, builder.getUInt32Ty());
+}
+
+static mlir::Value emitAMDGPUWorkGroupSizeV4(CIRGenFunction &cgf,
+ mlir::Location loc,
+ unsigned index) {
+ CIRGenBuilderTy &builder = cgf.getBuilder();
+ mlir::Value dispatchPtr = emitAMDGPUDispatchPtr(cgf, loc);
+
+ // Indexing the HSA kernel_dispatch_packet struct.
+ mlir::Value groupSizeLd = emitAMDGPUInvariantLoad(
+ cgf, loc, dispatchPtr, builder.getUInt64(4 + index * 2, loc),
+ builder.getUInt16Ty(), CharUnits::fromQuantity(2));
+ mlir::Value groupSize =
+ builder.createIntCast(groupSizeLd, builder.getUInt32Ty());
+
+ if (cgf.getLangOpts().OffloadUniformBlock)
+ return groupSize;
+
+ mlir::Value workgroupID = emitAMDGPUWorkGroupID(cgf, loc, index);
+ mlir::Value gridSize = emitAMDGPUInvariantLoad(
+ cgf, loc, dispatchPtr, builder.getUInt64(12 + index * 4, loc),
+ builder.getUInt32Ty(), CharUnits::fromQuantity(4));
+ mlir::Value mul = builder.createMul(loc, workgroupID, groupSize);
+ mlir::Value remainder = builder.createSub(loc, gridSize, mul);
+ mlir::Value isPartial =
+ builder.createCompare(loc, cir::CmpOpKind::lt, remainder, groupSize);
+ return builder.createSelect(loc, isPartial, remainder, groupSize);
+}
+
+static mlir::Value emitAMDGPUWorkGroupSize(CIRGenFunction &cgf,
----------------
aobolensk wrote:
done
https://github.com/llvm/llvm-project/pull/231156
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