================
@@ -544,11 +544,14 @@ mlir::LogicalResult CIRGenFunction::emitAsmStmt(const
AsmStmt &s) {
cir::RecordType::getAllDataKinds(resultRegTypes));
bool hasSideEffect = s.isVolatile() || s.getNumOutputs() == 0;
+ // Asm may contain an intrinsically convergent op such as a barrier.
+ bool isConvergent = getLangOpts().assumeFunctionsAreConvergent();
----------------
aobolensk wrote:
Added, it makes sense
https://github.com/llvm/llvm-project/pull/233772
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