This revision was automatically updated to reflect the committed changes. Closed by commit rL330195: [NEON] Define vget_high_f16() and vget_low_f16() intrinsics in AArch64 mode only (authored by kosarev, committed by ). Herald added a subscriber: llvm-commits.
Changed prior to commit: https://reviews.llvm.org/D45668?vs=142558&id=142789#toc Repository: rL LLVM https://reviews.llvm.org/D45668 Files: cfe/trunk/include/clang/Basic/arm_neon.td cfe/trunk/test/CodeGen/arm_neon_intrinsics.c Index: cfe/trunk/include/clang/Basic/arm_neon.td =================================================================== --- cfe/trunk/include/clang/Basic/arm_neon.td +++ cfe/trunk/include/clang/Basic/arm_neon.td @@ -398,8 +398,14 @@ //////////////////////////////////////////////////////////////////////////////// // E.3.21 Splitting vectors let InstName = "vmov" in { -def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilhfUcUsUiUlPcPs", OP_HI>; -def VGET_LOW : NoTestOpInst<"vget_low", "dk", "csilhfUcUsUiUlPcPs", OP_LO>; +def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilfUcUsUiUlPcPs", OP_HI>; +def VGET_LOW : NoTestOpInst<"vget_low", "dk", "csilfUcUsUiUlPcPs", OP_LO>; +} +let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in { + let InstName = "vmov" in { + def VGET_HIGH_F16 : NoTestOpInst<"vget_high", "dk", "h", OP_HI>; + def VGET_LOW_F16 : NoTestOpInst<"vget_low", "dk", "h", OP_LO>; + } } //////////////////////////////////////////////////////////////////////////////// Index: cfe/trunk/test/CodeGen/arm_neon_intrinsics.c =================================================================== --- cfe/trunk/test/CodeGen/arm_neon_intrinsics.c +++ cfe/trunk/test/CodeGen/arm_neon_intrinsics.c @@ -3254,13 +3254,6 @@ return vget_high_s64(a); } -// CHECK-LABEL: @test_vget_high_f16( -// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7> -// CHECK: ret <4 x half> [[SHUFFLE_I]] -float16x4_t test_vget_high_f16(float16x8_t a) { - return vget_high_f16(a); -} - // CHECK-LABEL: @test_vget_high_f32( // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3> // CHECK: ret <2 x float> [[SHUFFLE_I]] @@ -3560,13 +3553,6 @@ return vget_low_s64(a); } -// CHECK-LABEL: @test_vget_low_f16( -// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3> -// CHECK: ret <4 x half> [[SHUFFLE_I]] -float16x4_t test_vget_low_f16(float16x8_t a) { - return vget_low_f16(a); -} - // CHECK-LABEL: @test_vget_low_f32( // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1> // CHECK: ret <2 x float> [[SHUFFLE_I]]
Index: cfe/trunk/include/clang/Basic/arm_neon.td =================================================================== --- cfe/trunk/include/clang/Basic/arm_neon.td +++ cfe/trunk/include/clang/Basic/arm_neon.td @@ -398,8 +398,14 @@ //////////////////////////////////////////////////////////////////////////////// // E.3.21 Splitting vectors let InstName = "vmov" in { -def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilhfUcUsUiUlPcPs", OP_HI>; -def VGET_LOW : NoTestOpInst<"vget_low", "dk", "csilhfUcUsUiUlPcPs", OP_LO>; +def VGET_HIGH : NoTestOpInst<"vget_high", "dk", "csilfUcUsUiUlPcPs", OP_HI>; +def VGET_LOW : NoTestOpInst<"vget_low", "dk", "csilfUcUsUiUlPcPs", OP_LO>; +} +let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in { + let InstName = "vmov" in { + def VGET_HIGH_F16 : NoTestOpInst<"vget_high", "dk", "h", OP_HI>; + def VGET_LOW_F16 : NoTestOpInst<"vget_low", "dk", "h", OP_LO>; + } } //////////////////////////////////////////////////////////////////////////////// Index: cfe/trunk/test/CodeGen/arm_neon_intrinsics.c =================================================================== --- cfe/trunk/test/CodeGen/arm_neon_intrinsics.c +++ cfe/trunk/test/CodeGen/arm_neon_intrinsics.c @@ -3254,13 +3254,6 @@ return vget_high_s64(a); } -// CHECK-LABEL: @test_vget_high_f16( -// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7> -// CHECK: ret <4 x half> [[SHUFFLE_I]] -float16x4_t test_vget_high_f16(float16x8_t a) { - return vget_high_f16(a); -} - // CHECK-LABEL: @test_vget_high_f32( // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3> // CHECK: ret <2 x float> [[SHUFFLE_I]] @@ -3560,13 +3553,6 @@ return vget_low_s64(a); } -// CHECK-LABEL: @test_vget_low_f16( -// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3> -// CHECK: ret <4 x half> [[SHUFFLE_I]] -float16x4_t test_vget_low_f16(float16x8_t a) { - return vget_low_f16(a); -} - // CHECK-LABEL: @test_vget_low_f32( // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1> // CHECK: ret <2 x float> [[SHUFFLE_I]]
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