jyknight added inline comments.
================
Comment at: lib/Basic/Targets/Sparc.cpp:32
+ "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
"f32",
+ "f33", "f34", "f35", "f36", "f37", "f38", "f39", "f40", "f41", "f42",
"f43",
+ "f44", "f45", "f46", "f47", "f48", "f49", "f50", "f51", "f52", "f53",
"f54",
----------------
There's no such register as f33 (nor any odd-numbered reg above f32).
================
Comment at: lib/Basic/Targets/Sparc.cpp:52
+
+ // Double precision floating-point register
+ {{"d0"}, "f0"}, {{"d1"}, "f2"}, {{"d2"}, "f4"}, {{"d3"}, "f6"},
----------------
AFAICT, gcc doesn't actually accept "d" and "q" aliases in its inline asm, so
probably no point in LLVM doing so either.
https://reviews.llvm.org/D47137
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