On Tue, Dec 19, 2017 at 09:43:01PM -0500, Jason Lixfeld wrote: > > Are you saying that whatever L3 issues you had have been resolved in the > versions you cited above?
No, we only tested it way back (in 2015'ish?) for box's capabilities, then decided to only use for L2 backhaul. I'd defer to others on how control-plane policing works today on this platform.. I haven't tried it ever since. > > - Shallow buffers - 12MB for the whole box; and default values are > > ridiculously small. > > I'm not sure what Cisco was thinking regarding buffers on this box. ASIC > > speed has nothing to do with > > buffering requirements when you're downstepping from 10G to 1G -- you > > either have buffers to make up for > > the Tx/Rx rate difference or you tail drop, it's as simple as that. > > Are you referring partly to this? > > https://www.cisco.com/c/dam/en/us/td/docs/routers/asr920/design/Cisco-ASR920-Microburst-whitepaper.pdf > Yes, I'm referring to that document. The document claims that because ASR920 has faster ASIC it needs less output buffers. Sure, I could see the rationale for dealing with contention inside the box, but the document's rationale seems largely invalid, when microbursts are simply overwhelming 1GE port due to rate difference of interfaces on the box. James _______________________________________________ cisco-nsp mailing list cisco-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
