> The following is from a GSR 12012, running 12.0(10)S1
> router#sho int ser 1/0
> router#sho controllers serial 1/0
there also:
r1#sh gsr
Slot 0 type = Route Processor
state = IOS Running PRIMARY
Slot 1 type = 1 port ATM Over SONET OC12c/STM-4c
state = Line Card Enabled
Slot 2 type = 4 port ATM Over SONET OC-3c/STM-1
state = Line Card Enabled
[...]
LC-Slot1#show ver
Cisco Internetwork Operating System Software
IOS (tm) GS Software (GLC1-LC-M), Version 12.0(15)S, EARLY DEPLOYMENT RELEASE SOFTWARE
(fc1)
TAC Support: http://www.cisco.com/cgi-bin/ibld/view.pl?i=support
Copyright (c) 1986-2001 by cisco Systems, Inc.
Compiled Fri 26-Jan-01 18:42 by pwade
Image text-base: 0x40010950, data-base: 0x40480000
ROM: System Bootstrap, Version 12.0(20000609:183828) [bdelaney-blizzard.commit 104],
DEVELOPMENT SOFTWARE
ROM: GS Software (GLC1-LC-M), Version 12.0(15)S, EARLY DEPLOYMENT RELEASE SOFTWARE
(fc1)
LC-Slot1 uptime is 17 hours, 37 minutes
System restarted at 16:14:09 MET Tue Jan 30 2001
Running default software
cisco OC12-ATM (R5000) processor (revision 0x02) with 262144K bytes of memory.
R5000 CPU at 200Mhz, Implementation 35, Rev 2.1
Last reset from mbus reset
Configuration register is 0x0
LC-Slot1#sh contr
TX SAR (Patch 3.2.2) is Operational;
RX SAR (Patch 3.2.2) is Operational;
Interface Configuration Mode:
STM-4
Active Maker Channels: total # 5
VCID VPI ChID Type OutputInfo InPkts InOAMs MacString
1 0 2D08 UBR 0C019120 15274 0 2D082000AAAA030000000800
00000000 0 0
2 0 2D28 UBR 0C019140 0 0 2D282000AAAA030000000800
00000000 0 0
3 0 2D48 UBR 0C019160 402 0 2D482000AAAA030000000800
00000000 0 0
4 0 2E88 UBR 0C019180 331475 0 2E882000AAAA030000000800
00000000 0 0
5 0 2EA8 UBR 0C0191A0 152248 0 2EA82000AAAA030000000800
00000000 0 0
SAR Counters:
tx_paks 459851 tx_abort_paks 0 tx_idle_cells 2584471704
rx_paks 499189 rx_drop_paks 0 rx_discard_cells 10
Host Counters:
rx_crc_err_paks 0 rx_giant_paks 0
rx_abort_paks 0 rx_crc10_cells 0
rx_tmout_paks 0 rx_unknown_paks 0
rx_out_buf_paks 0 rx_unknown_vc_paks 0
rx_len_err_paks 0 rx_len_crc32_err_paks 0
LC-Slot1#sh contr ?
atm Show ATM controllers
events LC event counters
fia Fabric Interface ASIC info
frfab From Fab (TX)
io IO information
l3 L3 information
ratelimit Rate limit information
rewrites L2 rewrite table
tofab To Fab (RX)
| Output modifiers
<cr>
--
Regards,
Adam Obszyński
ATM Inc.
+48-22-5156418
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