This is an automated email from the ASF dual-hosted git repository.

ggregory pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/commons-codec.git


The following commit(s) were added to refs/heads/master by this push:
     new e616873e Javadoc spelling
e616873e is described below

commit e616873e08e2d335ccbc5599ded74335e4cf2487
Author: Gary Gregory <garydgreg...@gmail.com>
AuthorDate: Sun Nov 26 15:46:03 2023 -0500

    Javadoc spelling
---
 src/main/java/org/apache/commons/codec/digest/PureJavaCrc32.java  | 2 +-
 src/main/java/org/apache/commons/codec/digest/PureJavaCrc32C.java | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32.java 
b/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32.java
index bed1257e..e50b5f22 100644
--- a/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32.java
+++ b/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32.java
@@ -19,7 +19,7 @@ package org.apache.commons.codec.digest;
 import java.util.zip.Checksum;
 
 /**
- * A pure-java implementation of the CRC32 checksum that uses
+ * A pure-Java implementation of the CRC32 checksum that uses
  * the same polynomial as the built-in native CRC32.
  * <p>
  * This is to avoid the JNI overhead for certain uses of checksumming
diff --git a/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32C.java 
b/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32C.java
index dbd1e4ad..93cb44b6 100644
--- a/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32C.java
+++ b/src/main/java/org/apache/commons/codec/digest/PureJavaCrc32C.java
@@ -23,7 +23,7 @@ package org.apache.commons.codec.digest;
 import java.util.zip.Checksum;
 
 /**
- * A pure-java implementation of the CRC32 checksum that uses the CRC32-C 
polynomial, the same polynomial used by iSCSI and implemented on many Intel 
chipsets
+ * A pure-Java implementation of the CRC32 checksum that uses the CRC32-C 
polynomial, the same polynomial used by iSCSI and implemented on many Intel 
chipsets
  * supporting SSE 4.2.
  *
  * <p>

Reply via email to