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commit f3791af59739bb7e0f37ac15ec07589adc8d7d9c Author: Jerzy Kasenberg <[email protected]> AuthorDate: Sun Mar 30 17:07:07 2025 +0200 hw/mcu: STM32H7 add HSI48 initialization Code allows to enable HSI48 clock for USB operation. Signed-off-by: Jerzy Kasenberg <[email protected]> Signed-off-by: Jerzy Kasenberg <[email protected]> --- hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c | 11 +++++++++++ hw/mcu/stm/stm32h7xx/syscfg.yml | 15 +++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c b/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c index 5ee05d64f..3ed90d418 100644 --- a/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c +++ b/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c @@ -47,6 +47,7 @@ SystemClock_Config(void) { RCC_OscInitTypeDef osc_init = {0}; RCC_ClkInitTypeDef clk_init = {0}; + RCC_PeriphCLKInitTypeDef per_clk_init = {0}; HAL_StatusTypeDef status; /* Enable the MCU instruction cache */ @@ -168,6 +169,11 @@ SystemClock_Config(void) osc_init.PLL.PLLRGE = MYNEWT_VAL(STM32_CLOCK_PLLRGE); + if (MYNEWT_VAL(STM32_CLOCK_HSI48)) { + osc_init.OscillatorType |= RCC_OSCILLATORTYPE_HSI48; + osc_init.HSI48State = RCC_HSI48_ON; + } + status = HAL_RCC_OscConfig(&osc_init); if (status != HAL_OK) { assert(0); @@ -231,5 +237,10 @@ SystemClock_Config(void) assert(0); } #endif + if (MYNEWT_VAL(STM32_CLOCK_USBSEL)) { + per_clk_init.PeriphClockSelection = RCC_PERIPHCLK_USB; + per_clk_init.UsbClockSelection = MYNEWT_VAL(STM32_CLOCK_USBSEL); + HAL_RCCEx_PeriphCLKConfig(&per_clk_init); + } } #endif diff --git a/hw/mcu/stm/stm32h7xx/syscfg.yml b/hw/mcu/stm/stm32h7xx/syscfg.yml index 69298308f..708862f65 100644 --- a/hw/mcu/stm/stm32h7xx/syscfg.yml +++ b/hw/mcu/stm/stm32h7xx/syscfg.yml @@ -70,6 +70,18 @@ syscfg.defs: description: HSI calibration value value: 'RCC_HSICALIBRATION_DEFAULT' + STM32_CLOCK_HSI48: + description: Enable high-speed 48MHz internal clock source + value: 0 + + STM32_CLOCK_USBSEL: + description: > + Select USB clock source. + 0 - disabled + Other acceptable values + RCC_USBCLKSOURCE_PLL, RCC_USBCLKSOURCE_PLL3, RCC_USBCLKSOURCE_HSI48 + value: RCC_USBCLKSOURCE_PLL + STM32_CLOCK_PLL_PLLM: description: PLL config M parameter value: 0 @@ -137,3 +149,6 @@ syscfg.defs: syscfg.vals: MCU_RAM_START: 0x24000000 MCU_RAM_SIZE: 0x1C000 + +syscfg.vals.STM32_CLOCK_HSI48: + STM32_CLOCK_USBSEL: RCC_USBCLKSOURCE_HSI48
