Repository: incubator-mynewt-core Updated Branches: refs/heads/develop a226ca78d -> 1f227f41e
MYNEWT-581; kernel/os - support hw fpu in context switches for cortex-m4. Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/d557a922 Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/d557a922 Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/d557a922 Branch: refs/heads/develop Commit: d557a9228b4b374fb4f7a7b80452c758e36f5fa9 Parents: a226ca7 Author: Marko Kiiskila <ma...@runtime.io> Authored: Tue Feb 7 13:26:33 2017 -0800 Committer: Marko Kiiskila <ma...@runtime.io> Committed: Tue Feb 7 13:26:33 2017 -0800 ---------------------------------------------------------------------- compiler/arm-none-eabi-m4/syscfg.yml | 4 ++++ kernel/os/src/arch/cortex_m4/m4/HAL_CM4.s | 18 +++++++++++++++++- kernel/os/src/arch/cortex_m4/os_arch_arm.c | 13 +++++++++++++ 3 files changed, 34 insertions(+), 1 deletion(-) ---------------------------------------------------------------------- http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/d557a922/compiler/arm-none-eabi-m4/syscfg.yml ---------------------------------------------------------------------- diff --git a/compiler/arm-none-eabi-m4/syscfg.yml b/compiler/arm-none-eabi-m4/syscfg.yml new file mode 100644 index 0000000..a7e0ecf --- /dev/null +++ b/compiler/arm-none-eabi-m4/syscfg.yml @@ -0,0 +1,4 @@ +syscfg.defs: + HARDFLOAT: + description: 'Use hardware FPU' + value: 0 http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/d557a922/kernel/os/src/arch/cortex_m4/m4/HAL_CM4.s ---------------------------------------------------------------------- diff --git a/kernel/os/src/arch/cortex_m4/m4/HAL_CM4.s b/kernel/os/src/arch/cortex_m4/m4/HAL_CM4.s index 9c6ab52..c3def4e 100755 --- a/kernel/os/src/arch/cortex_m4/m4/HAL_CM4.s +++ b/kernel/os/src/arch/cortex_m4/m4/HAL_CM4.s @@ -24,8 +24,8 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. *---------------------------------------------------------------------------*/ +#include <syscfg/syscfg.h> - .file "HAL_CM4.S" .syntax unified /*---------------------------------------------------------------------------- @@ -155,12 +155,28 @@ PendSV_Handler: BXEQ LR /* RETI, no task switch */ MRS R12,PSP /* Read PSP */ +#if MYNEWT_VAL(HARDFLOAT) + TST LR,#0x10 /* is it extended frame? */ + IT EQ + VSTMDBEQ R12!,{S16-S31} /* yes; push the regs */ + STMDB R12!,{R4-R11,LR} /* Save Old context */ +#else STMDB R12!,{R4-R11} /* Save Old context */ +#endif STR R12,[R1,#0] /* Update stack pointer in current task */ STR R2,[R3] /* g_current_task = highest ready */ LDR R12,[R2,#0] /* get stack pointer of task we will start */ +#if MYNEWT_VAL(HARDFLOAT) + LDMIA R12!,{R4-R11,LR} /* Restore New Context */ + TST LR,#0x10 /* is it extended frame? */ + ITTE EQ + VLDMIAEQ R12!,{S16-S31} /* yes; pull the regs */ + MVNEQ LR,#~0xFFFFFFED /* BX treats it as extended */ + MVNNE LR,#~0xFFFFFFFD /* BX treats is as basic frame */ +#else LDMIA R12!,{R4-R11} /* Restore New Context */ +#endif MSR PSP,R12 /* Write PSP */ BX LR /* Return to Thread Mode */ http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/d557a922/kernel/os/src/arch/cortex_m4/os_arch_arm.c ---------------------------------------------------------------------- diff --git a/kernel/os/src/arch/cortex_m4/os_arch_arm.c b/kernel/os/src/arch/cortex_m4/os_arch_arm.c index 59cee8a..c914cae 100755 --- a/kernel/os/src/arch/cortex_m4/os_arch_arm.c +++ b/kernel/os/src/arch/cortex_m4/os_arch_arm.c @@ -16,6 +16,7 @@ * specific language governing permissions and limitations * under the License. */ +#include <syscfg/syscfg.h> #include "os/os.h" #include "os/os_arch.h" @@ -36,6 +37,12 @@ extern void SysTick_Handler(void); #define INITIAL_xPSR 0x01000000 /* + * Initial LR indicating basic frame. + * See ARMv7-M Architecture Ref Manual + */ +#define INITIAL_LR 0xfffffffd; + +/* * Exception priorities. The higher the number, the lower the priority. A * higher priority exception will interrupt a lower priority exception. */ @@ -55,6 +62,9 @@ struct stack_frame { uint32_t r9; uint32_t r10; uint32_t r11; +#if MYNEWT_VAL(HARDFLOAT) + uint32_t exc_lr; +#endif uint32_t r0; uint32_t r1; uint32_t r2; @@ -165,6 +175,9 @@ os_arch_task_stack_init(struct os_task *t, os_stack_t *stack_top, int size) sf->xpsr = INITIAL_xPSR; sf->pc = (uint32_t)t->t_func; sf->r0 = (uint32_t)t->t_arg; +#if MYNEWT_VAL(HARDFLOAT) + sf->exc_lr = INITIAL_LR; +#endif return (s); }
