raiden00pl commented on code in PR #16500:
URL: https://github.com/apache/nuttx/pull/16500#discussion_r2140526801


##########
arch/arm/src/stm32f0l0g0/stm32_adc.c:
##########
@@ -1858,6 +1927,55 @@ static int adc_ioc_change_ints(struct adc_dev_s *dev, 
int cmd, bool arg)
 
   return ret;
 }
+#ifdef CONFIG_STM32F0L0G0_ADC_OVERSAMPLE
+
+/****************************************************************************
+ * Name: adc_ioc_set_oversample
+ *
+ * Description:
+ *   For STM32G0 and STM32L0: Configure hardware oversampling via CFGR2.
+ *
+ * Input:
+ *   dev - pointer to the ADC device
+ *   arg - Packed 32-bit value that matches CFGR2 layout for OVSE, TOVS,
+ *         OVSR[2:0] and OVSS[3:0].
+ *
+ *         Bit fields (match ADC_CFGR2 register layout):
+ *           [0]     = OVSE  (enable oversampling)
+ *           [1]     = TOVS  (triggered oversampling)
+ *           [4:2]   = OVSR  (ratio: 000=2x, ..., 111=256x)
+ *           [9:5]   = OVSS  (right shift: 00000=no shift, ..., 11111=31-bit)
+ *
+ * Returned Value:
+ *   OK (0) on success
+ *
+ ****************************************************************************/
+
+static int adc_ioc_set_oversample(FAR struct adc_dev_s *dev, uint32_t arg)

Review Comment:
   ```suggestion
   static int adc_ioc_set_oversample(struct adc_dev_s *dev, uint32_t arg)
   ```



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