tinnedkarma commented on code in PR #17161: URL: https://github.com/apache/nuttx/pull/17161#discussion_r2421786953
########## arch/risc-v/src/mpfs/mpfs_can.c: ########## @@ -0,0 +1,2923 @@ +/**************************************************************************** + * arch/risc-v/src/mpfs/mpfs_can.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <sys/time.h> +#include <inttypes.h> +#include <stdint.h> +#include <stdbool.h> +#include <stdlib.h> +#include <stdio.h> +#include <unistd.h> +#include <time.h> +#include <string.h> +#include <debug.h> +#include <errno.h> + +#include <nuttx/can.h> +#include <nuttx/wdog.h> +#include <nuttx/irq.h> +#include <nuttx/arch.h> +#include <nuttx/wqueue.h> +#include <nuttx/signal.h> +#include <nuttx/net/netdev.h> +#include <nuttx/net/can.h> +#include <nuttx/can/can.h> + +#include <arch/board/board.h> + +#include "mpfs_can.h" +#include "riscv_internal.h" +#include "mpfs_memorymap.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_MPFS_MSS_CAN +# error This should not be compiled if MSS CAN block is not enabled +#endif + +/* CAN 0 and 1 register base definition */ + +#define CAN0_BASE MPFS_CAN0_LO_BASE +#define CAN1_BASE MPFS_CAN1_LO_BASE + +/* High level driver operational configuration */ + +#define CANWORK HPWORK + +/* For allocating the tx and rx CAN frame buffer */ + +#define POOL_SIZE 1 +#define TIMESTAMP_SIZE sizeof(struct timeval) /* support timestamping frame */ + +/* MSS CAN TX/RX buffer configuration */ + +#define CAN_RX_BUFFER 32 +#define CAN_TX_BUFFER 32 +#define CAN_RX_BUFFER_CTRL_DEFAULT MPFS_CAN_RX_MSG_CTRL_CMD_WPNH \ + | MPFS_CAN_RX_MSG_CTRL_CMD_WPNL \ + | MPFS_CAN_RX_MSG_CTRL_CMD_RX_BUFFER_EBL \ + | MPFS_CAN_RX_MSG_CTRL_CMD_RX_INT_ENABLE + +/* MSS CAN Configuration and Speed definitions */ + +#define CAN_SAMPLE_BOTH_EDGES MPFS_CAN_CAN_CONFIG_EDGE_MODE +#define CAN_THREE_SAMPLES MPFS_CAN_CAN_CONFIG_SAMPLING_MODE +#define CAN_SET_SJW(_sjw) (_sjw << MPFS_CAN_CAN_CONFIG_CFG_SJW_SHIFT) +#define CAN_AUTO_RESTART MPFS_CAN_CAN_CONFIG_AUTO_RESTART +#define CAN_SET_TSEG2(_tseg2) (_tseg2 << MPFS_CAN_CAN_CONFIG_CFG_TSEG2_SHIFT) +#define CAN_SET_TSEG1(_tseg1) (_tseg1 << MPFS_CAN_CAN_CONFIG_CFG_TSEG1_SHIFT) +#define CAN_SET_BITRATE(_br) (_br << MPFS_CAN_CAN_CONFIG_CFG_BITRATE_SHIFT) +#define CAN_ARB_FIXED_PRIO MPFS_CAN_CAN_CONFIG_CFG_ARBITER +#define CAN_LITTLE_ENDIAN MPFS_CAN_CAN_CONFIG_SWAP_ENDIAN + +/* The following constants are used in the PolarFire SoC MSS CAN driver for + * bitrate definitions: + * + * | Constants | Description | + * |--------------------|---------------------------------------------------| + * | CAN_SPEED_8M_5K | Indicates CAN controller shall be configured with | + * | | 5Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_5K | Indicates CAN controller shall be configured with | + * | | 5Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_5K | Indicates CAN controller shall be configured with | + * | | 5Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_10K | Indicates CAN controller shall be configured with | + * | | 10Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_10K | Indicates CAN controller shall be configured with | + * | | 10Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_10K | Indicates CAN controller shall be configured with | + * | | 10Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_20K | Indicates CAN controller shall be configured with | + * | | 20Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_20K | Indicates CAN controller shall be configured with | + * | | 20Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_20K | Indicates CAN controller shall be configured with | + * | | 20Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_50K | Indicates CAN controller shall be configured with | + * | | 50Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_50K | Indicates CAN controller shall be configured with | + * | | 50Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_50K | Indicates CAN controller shall be configured with | + * | | 50Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_100K | Indicates CAN controller shall be configured with | + * | | 100Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_100K | Indicates CAN controller shall be configured with | + * | | 100Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_100K | Indicates CAN controller shall be configured with | + * | | 100Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_125K | Indicates CAN controller shall be configured with | + * | | 125Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_125K | Indicates CAN controller shall be configured with | + * | | 125Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_125K | Indicates CAN controller shall be configured with | + * | | 125Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_250K | Indicates CAN controller shall be configured with | + * | | 250Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_250K | Indicates CAN controller shall be configured with | + * | | 250Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_250K | Indicates CAN controller shall be configured with | + * | | 250Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_500K | Indicates CAN controller shall be configured with | + * | | 500Kbps baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_500K | Indicates CAN controller shall be configured with | + * | | 500Kbps baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_500K | Indicates CAN controller shall be configured with | + * | | 500Kbps baud rate if the input clock is 32MHz. | + * | CAN_SPEED_8M_1M | Indicates CAN controller shall be configured with | + * | | 1MBPS baud rate if the input clock is 8MHz. | + * | CAN_SPEED_16M_1M | Indicates CAN controller shall be configured with | + * | | 1MBPS baud rate if the input clock is 16MHz. | + * | CAN_SPEED_32M_1M | Indicates CAN controller shall be configured with | + * | | 1MBPS baud rate if the input clock is 32MHz. | + */ + +/* 5000m 81% Sample bit three times */ + +#define CAN_SPEED_8M_5K CAN_SET_BITRATE(99)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES +#define CAN_SPEED_16M_5K CAN_SET_BITRATE(199)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES +#define CAN_SPEED_32M_5K CAN_SET_BITRATE(399)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES + +/* 5000m 81% Sample bit three times */ + +#define CAN_SPEED_8M_10K CAN_SET_BITRATE(49)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES +#define CAN_SPEED_16M_10K CAN_SET_BITRATE(99)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES +#define CAN_SPEED_32M_10K CAN_SET_BITRATE(199)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES + +/* 2500m 81% Sample bit three times */ + +#define CAN_SPEED_8M_20K CAN_SET_BITRATE(24)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES +#define CAN_SPEED_16M_20K CAN_SET_BITRATE(49)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES +#define CAN_SPEED_32M_20K CAN_SET_BITRATE(99)|CAN_SET_TSEG1(11) \ + |CAN_SET_TSEG2(2)|CAN_THREE_SAMPLES + +/* 1000m 87% */ + +#define CAN_SPEED_8M_50K CAN_SET_BITRATE(9)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_16M_50K CAN_SET_BITRATE(19)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_32M_50K CAN_SET_BITRATE(39)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) + +/* 600m 87% */ + +#define CAN_SPEED_8M_100K CAN_SET_BITRATE(4)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_16M_100K CAN_SET_BITRATE(9)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_32M_100K CAN_SET_BITRATE(19)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) + +/* 500m 87% */ + +#define CAN_SPEED_8M_125K CAN_SET_BITRATE(3)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_16M_125K CAN_SET_BITRATE(7)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_32M_125K CAN_SET_BITRATE(15)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) + +/* 250m 87% */ + +#define CAN_SPEED_8M_250K CAN_SET_BITRATE(1)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_16M_250K CAN_SET_BITRATE(3)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_32M_250K CAN_SET_BITRATE(7)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) + +/* 100m 75% @ 8M, 87% @ 16M */ + +#define CAN_SPEED_8M_500K CAN_SET_BITRATE(1)|CAN_SET_TSEG1(4) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_16M_500K CAN_SET_BITRATE(1)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_32M_500K CAN_SET_BITRATE(3)|CAN_SET_TSEG1(12) \ + |CAN_SET_TSEG2(1) + +/* 25m 75% */ +#define CAN_SPEED_8M_1M CAN_SET_BITRATE(0)|CAN_SET_TSEG1(4) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_16M_1M CAN_SET_BITRATE(1)|CAN_SET_TSEG1(4) \ + |CAN_SET_TSEG2(1) +#define CAN_SPEED_32M_1M CAN_SET_BITRATE(3)|CAN_SET_TSEG1(4) \ + |CAN_SET_TSEG2(1) + +/* The following constants are used for error codes: + * + * | Constants | Description | + * |-----------------------|---------------------------------------------| + * | CAN_OK | Indicates there is no error | + * | CAN_ERR | Indicates error condition | + * | CAN_TSEG1_TOO_SMALL | Value provided to configure TSEG1 is too | + * | | small | + * | CAN_TSEG2_TOO_SMALL | Value provided to configure TSEG2 is too | + * | | small | + * | CAN_SJW_TOO_BIG | Value provided to configure synchronous jump| + * | | width (SJW) is too big. | + * | CAN_BASIC_CAN_BUFFER | Indicates that buffer is configured for | + * | | Basic CAN operation | + * | CAN_NO_RTR_BUFFER | Indicates that there is no buffer for | + * | | remote transmit request (RTR) frame | + * | CAN_INVALID_BUFFER | Indicates invalid buffer number | + * | CAN_NO_MSG | Indicates no message available | + * | CAN_VALID_MSG | Indicates message is valid | + */ + +#define CAN_OK 0 +#define CAN_ERR 1 +#define CAN_TSEG1_TOO_SMALL 2 +#define CAN_TSEG2_TOO_SMALL 3 +#define CAN_SJW_TOO_BIG 4 +#define CAN_BASIC_CAN_BUFFER 5 +#define CAN_NO_RTR_BUFFER 6 +#define CAN_INVALID_BUFFER 7 +#define CAN_NO_MSG 8 +#define CAN_VALID_MSG 0 + +/**************************************************************************** + * Utility definitions + ****************************************************************************/ + +#define print_uint32_t(prefix, val) do { \ + const char p_str[] = prefix; \ + /* prefix + " 0b" + 32 bits + null terminator */ \ + char binary_str[sizeof(p_str) + 2 + 32 + 1]; \ + sprintf(binary_str, "%s 0b", p_str); \ + for (int i = 31; i >= 0; i--) { \ + sprintf(binary_str + strlen(binary_str), "%d", ((val) >> i) & 1); \ + } \ + caninfo("%s", binary_str); \ +} while (0) Review Comment: But why use this approach? It's both hard to read and debug. I suggest using static inline here. Also I agree with the use of ``#ifdef CONFIG_CAN_DEBUG_INFO`` -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
