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commit a266398a4f4ab459fb86dd93c68c505bc3a13529 Author: jsanchez-2g <[email protected]> AuthorDate: Tue Aug 18 14:34:49 2026 -0500 arm/stm32: Enable the CRS frequency error counter with autotrim. stm32_enable_hsi48() set CRS_CR_AUTOTRIMEN but left CRS_CR_CEN clear. AUTOTRIMEN only instructs the hardware to apply corrections derived from the frequency error counter; the counter itself is enabled by CEN. With CEN clear no error measurement is ever produced and the HSI48 TRIM value stays at its reset default, so the oscillator is never disciplined to the synchronisation source. Set both bits, matching the value the STM32 ROM bootloader programs when it runs its own crystal-less USB stack (CRS_CR = 0x1a60, i.e. CEN | AUTOTRIMEN with a trimmed TRIM field). This file is shared by the M0 STM32 parts (F0, G0, C0, L0); all of them require CEN for automatic trimming to function. Assisted-by: GitHub Copilot:claude-opus-5 Signed-off-by: jsanchez-2g <[email protected]> --- arch/arm/src/common/stm32/stm32_hsi48_m0_v1.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/src/common/stm32/stm32_hsi48_m0_v1.c b/arch/arm/src/common/stm32/stm32_hsi48_m0_v1.c index 747cc5f19dc..9ba0a0f08e3 100644 --- a/arch/arm/src/common/stm32/stm32_hsi48_m0_v1.c +++ b/arch/arm/src/common/stm32/stm32_hsi48_m0_v1.c @@ -145,13 +145,13 @@ void stm32_enable_hsi48(enum syncsrc_e syncsrc) putreg32(regval, STM32_CRS_CFGR); - /* Set the AUTOTRIMEN bit the CRS_CR register to enables the automatic - * hardware adjustment of TRIM bits according to the measured frequency - * error between the selected SYNC event. + /* Enable the frequency error counter and automatic trimming. The counter + * measures the error against the selected SYNC event; automatic trimming + * adjusts the HSI48 TRIM bits from that measurement. */ regval = getreg32(STM32_CRS_CR); - regval |= CRS_CR_AUTOTRIMEN; + regval |= CRS_CR_CEN | CRS_CR_AUTOTRIMEN; putreg32(regval, STM32_CRS_CR); }
