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commit 6aa4adc1c5a3b10fd3c0ede4dd605004a66bd681 Author: jsanchez-2g <[email protected]> AuthorDate: Tue Aug 18 14:35:55 2026 -0500 boards/nucleo-l073rz: Use USB SOF as the HSI48 CRS sync source. STM32_HSI48_SYNCSRC was SYNCSRC_NONE, which makes stm32_enable_hsi48() return before configuring the CRS at all. HSI48 then free runs at its untrimmed factory frequency, which is not accurate enough for USB full speed operation. The board has no CRS_SYNC pin wired and does not fit an LSE crystal for this purpose, so the USB start of frame packet is the available synchronisation source. This is the intended configuration for crystal-less USB on this part. Assisted-by: GitHub Copilot:claude-opus-5 Signed-off-by: jsanchez-2g <[email protected]> --- boards/arm/stm32l0/nucleo-l073rz/include/board.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards/arm/stm32l0/nucleo-l073rz/include/board.h b/boards/arm/stm32l0/nucleo-l073rz/include/board.h index af284ca168e..24088b7dae6 100644 --- a/boards/arm/stm32l0/nucleo-l073rz/include/board.h +++ b/boards/arm/stm32l0/nucleo-l073rz/include/board.h @@ -91,7 +91,7 @@ #if defined(CONFIG_STM32_USB) || defined(CONFIG_STM32_RNG) # define STM32_USE_CLK48 1 # define STM32_CLK48_SEL RCC_CCIPR_CLK48SEL_HSI48 -# define STM32_HSI48_SYNCSRC SYNCSRC_NONE +# define STM32_HSI48_SYNCSRC SYNCSRC_USB #endif /* TODO: timers */
