raiden00pl commented on code in PR #19978:
URL: https://github.com/apache/nuttx/pull/19978#discussion_r3864094545
##########
arch/arm/src/common/stm32/stm32_uid.c:
##########
@@ -56,6 +61,20 @@ void stm32_get_uniqueid(uint8_t uniqueid[12])
{
uint32_t uid[3];
int i;
+#if defined(CONFIG_ARCH_CHIP_STM32H5) && defined(CONFIG_STM32_ICACHE)
+ bool icache_enabled;
+
+ /* The STM32H5 UID is stored in flash information memory, which cannot be
+ * read while the instruction cache is enabled. Preserve the cache state
+ * across the UID access.
+ */
+
+ icache_enabled = (getreg32(STM32_ICACHE_CR) & ICACHE_CR_EN) != 0;
Review Comment:
can we add simple helper function `stm32_icache_enabled()` in
`stm32_icache.c` so we don't use ICACHE registers directly ?
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