xiaoxiang781216 commented on code in PR #20125: URL: https://github.com/apache/nuttx/pull/20125#discussion_r3998379031
########## arch/risc-v/include/irq.h: ########## @@ -201,7 +201,26 @@ #define REG_INT_CTX_NDX 32 -#ifdef CONFIG_ARCH_RISCV_INTXCPT_EXTREGS +/* On a CLIC part, mcause carries mpp / mpie / mpil / interrupt -- state that + * mret consults -- so it must be saved and restored with the frame, not just + * read for dispatch. Uses the ARCH_RISCV_INTXCPT_EXTREGS extension slot, + * so REG_INT_CTX and everything below it keep their existing offsets. + */ + +#if defined(CONFIG_ARCH_CHIP_ESP32P4) && !defined(CONFIG_BUILD_FLAT) Review Comment: not good to check CONFIG_ARCH_CHIP_ESP32P4 in the common code ########## arch/risc-v/src/common/riscv_swint.c: ########## @@ -137,6 +140,170 @@ uintptr_t dispatch_syscall(unsigned int nbr, uintptr_t parm1, } #endif +#ifdef CONFIG_RISCV_FRAME_TRACE Review Comment: could you move the trace frame to new pr ########## arch/risc-v/src/common/riscv_schedulesigaction.c: ########## @@ -121,4 +121,13 @@ void up_schedule_sigaction(struct tcb_s *tcb) #endif tcb->xcp.regs[REG_INT_CTX] = int_ctx; + +#ifdef CONFIG_RISCV_FRAME_TRACE + /* Record the frame this built. It deliberately sets MPP=M so the + * trampoline runs privileged, and leaves REG_MCAUSE as the copied user + * value. + */ + + riscv_trace_frame(RISCV_TRACE_TAG_SIG_SCHED, tcb, tcb->xcp.regs); Review Comment: ditto -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
