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commit a3fb91e0baf2a95e21e70acd878aa3d4dfcb6498 Author: Jukka Laitinen <[email protected]> AuthorDate: Wed Sep 2 15:41:27 2026 +0300 arch/arm/imxrt: Small fixes for I2C&SPI to build for iMXRT118x Add a few !defined(CONFIG_ARCH_FAMILY_IMXRT118x) gates similar to 1176 to buid the common drivers also for 118x variants. Signed-off-by: Jukka Laitinen <[email protected]> --- arch/arm/src/imxrt/imxrt_lpi2c.c | 24 ++++++++++++++---------- arch/arm/src/imxrt/imxrt_lpspi.c | 12 ++++++++---- 2 files changed, 22 insertions(+), 14 deletions(-) diff --git a/arch/arm/src/imxrt/imxrt_lpi2c.c b/arch/arm/src/imxrt/imxrt_lpi2c.c index 561ae36564c..ce57103b962 100644 --- a/arch/arm/src/imxrt/imxrt_lpi2c.c +++ b/arch/arm/src/imxrt/imxrt_lpi2c.c @@ -168,11 +168,11 @@ struct imxrt_lpi2c_config_s uint16_t busy_idle; /* LPI2C Bus Idle Timeout */ uint8_t filtscl; /* Glitch Filter for SCL pin */ uint8_t filtsda; /* Glitch Filter for SDA pin */ - uint32_t scl_pin; /* Peripheral configuration for SCL as SCL */ - uint32_t sda_pin; /* Peripheral configuration for SDA as SDA */ + gpio_pinset_t scl_pin; /* Peripheral configuration for SCL as SCL */ + gpio_pinset_t sda_pin; /* Peripheral configuration for SDA as SDA */ #if defined(CONFIG_I2C_RESET) - uint32_t reset_scl_pin; /* GPIO configuration for SCL as SCL */ - uint32_t reset_sda_pin; /* GPIO configuration for SDA as SDA */ + gpio_pinset_t reset_scl_pin; /* GPIO configuration for SCL as SCL */ + gpio_pinset_t reset_sda_pin; /* GPIO configuration for SDA as SDA */ #endif uint8_t mode; /* Master or Slave mode */ #ifndef CONFIG_I2C_POLLED @@ -1072,7 +1072,8 @@ static void imxrt_lpi2c_tracedump(struct imxrt_lpi2c_priv_s *priv) static void imxrt_lpi2c_setclock(struct imxrt_lpi2c_priv_s *priv, uint32_t frequency) { -#ifndef CONFIG_ARCH_FAMILY_IMXRT117x +#if !defined(CONFIG_ARCH_FAMILY_IMXRT117x) && \ + !defined(CONFIG_ARCH_FAMILY_IMXRT118x) uint32_t pll3_div = 0; uint32_t lpi2c_clk_div; #endif @@ -1108,7 +1109,8 @@ static void imxrt_lpi2c_setclock(struct imxrt_lpi2c_priv_s *priv, /* Get the LPI2C clock source frequency */ -#ifdef CONFIG_ARCH_FAMILY_IMXRT117x +#if defined(CONFIG_ARCH_FAMILY_IMXRT117x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT118x) if (priv->config->base == IMXRT_LPI2C1_BASE) { imxrt_get_rootclock(CCM_CR_LPI2C1, &src_freq); @@ -1682,7 +1684,8 @@ void imxrt_lpi2c_clock_enable (uint32_t base) } else if (base == IMXRT_LPI2C4_BASE) { -#ifndef CONFIG_ARCH_FAMILY_IMXRT117x +#if !defined(CONFIG_ARCH_FAMILY_IMXRT117x) && \ + !defined(CONFIG_ARCH_FAMILY_IMXRT118x) imxrt_clockall_lpi2c4_serial(); #else imxrt_clockall_lpi2c4(); @@ -1722,7 +1725,8 @@ void imxrt_lpi2c_clock_disable (uint32_t base) } else if (base == IMXRT_LPI2C4_BASE) { -#ifndef CONFIG_ARCH_FAMILY_IMXRT117x +#if !defined(CONFIG_ARCH_FAMILY_IMXRT117x) && \ + !defined(CONFIG_ARCH_FAMILY_IMXRT118x) imxrt_clockoff_lpi2c4_serial(); #else imxrt_clockoff_lpi2c4(); @@ -2285,8 +2289,8 @@ static int imxrt_lpi2c_reset(struct i2c_master_s *dev) struct imxrt_lpi2c_priv_s *priv = (struct imxrt_lpi2c_priv_s *)dev; unsigned int clock_count; unsigned int stretch_count; - uint32_t scl_gpio; - uint32_t sda_gpio; + gpio_pinset_t scl_gpio; + gpio_pinset_t sda_gpio; uint32_t frequency; int ret; diff --git a/arch/arm/src/imxrt/imxrt_lpspi.c b/arch/arm/src/imxrt/imxrt_lpspi.c index af34bdbde02..7e60ac7b6c5 100644 --- a/arch/arm/src/imxrt/imxrt_lpspi.c +++ b/arch/arm/src/imxrt/imxrt_lpspi.c @@ -731,7 +731,8 @@ static inline void imxrt_lpspi_master_set_delays( uint32_t delay_ns, enum imxrt_delay_e type) { -#ifndef CONFIG_ARCH_FAMILY_IMXRT117x +#if !defined(CONFIG_ARCH_FAMILY_IMXRT117x) && \ + !defined(CONFIG_ARCH_FAMILY_IMXRT118x) uint32_t pll3_div; uint32_t pll_freq; #endif @@ -745,7 +746,8 @@ static inline void imxrt_lpspi_master_set_delays( uint32_t clock_div_prescaler; uint32_t additional_scaler; -#ifdef CONFIG_ARCH_FAMILY_IMXRT117x +#if defined(CONFIG_ARCH_FAMILY_IMXRT117x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT118x) if (priv->spibase == IMXRT_LPSPI1_BASE) { imxrt_get_rootclock(CCM_CR_LPSPI1, &src_freq); @@ -942,7 +944,8 @@ static uint32_t imxrt_lpspi_setfrequency(struct spi_dev_s *dev, { struct imxrt_lpspidev_s *priv = (struct imxrt_lpspidev_s *)dev; -#ifndef CONFIG_ARCH_FAMILY_IMXRT117x +#if !defined(CONFIG_ARCH_FAMILY_IMXRT117x) && \ + !defined(CONFIG_ARCH_FAMILY_IMXRT118x) uint32_t pll_freq; uint32_t pll3_div; #endif @@ -970,7 +973,8 @@ static uint32_t imxrt_lpspi_setfrequency(struct spi_dev_s *dev, LPSPI_CR_MEN, 0); } -#ifdef CONFIG_ARCH_FAMILY_IMXRT117x +#if defined(CONFIG_ARCH_FAMILY_IMXRT117x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT118x) if (priv->spibase == IMXRT_LPSPI1_BASE) { imxrt_get_rootclock(CCM_CR_LPSPI1, &src_freq);
