msli-dev opened a new pull request, #20381: URL: https://github.com/apache/nuttx/pull/20381
## Summary STM32H743 SDMMC1 cannot directly DMA to client buffers in D2/D3 SRAM or DTCM. Add optional, per-instance aligned IDMA bounce buffers so these buffers, and unaligned buffers, can use multi-block transfers. Writes are copied before IDMA; successful bounced reads are copied in the waiting thread rather than copying the full request in interrupt context. Add an optional `sdio_dev_s::maxrequest()` callback, returning bytes (zero/unset means no additional host limit). MMC/SD combines the host capacity with `CONFIG_MMCSD_MULTIBLOCK_LIMIT` and splits normal block reads/writes before DMA setup. With eight 512-byte bounce blocks, a 32 KiB request becomes eight 4 KiB host requests. The commits separate the functional change from whitespace-only cleanup required for full-file NuttX style checks. The branch is based on `apache/nuttx` master at `4a08b90a293d1b58d1e40de7ea4513ed816d9a4f`. Hardware reference: [ST AN5200, section 1.1 and Table 2](https://www.st.com/resource/en/application_note/an5200-getting-started-with-the-stm32h7-mcu-sdmmc-host-controller-stmicroelectronics.pdf). ## Impact - New opt-in `CONFIG_STM32_SDMMC_IDMA_BOUNCE_BUFFER`, with `CONFIG_STM32_SDMMC_IDMA_BOUNCE_BLOCKS=8` by default when enabled. Each enabled SDMMC instance has a separate buffer. - Default buffer storage is 4 KiB per instance, replacing the existing 512-byte internal buffer (3584 additional buffer bytes, plus structure/alignment overhead). The linker must place it in IDMA-accessible RAM; initialization checks its address and alignment when bounce support is enabled. - A positive RAM allow-list tightens IDMA preflight even with bounce support disabled. External-memory addresses outside that list can be rejected; compatibility with affected boards needs review. - The host request cap also splits directly accessible, aligned buffers. Large direct-I/O performance therefore needs comparison on hardware. - Other hosts with a zero-initialized/unset callback retain their existing request limits. The public SDIO structure changes; positional and dynamically initialized host instances need compatibility review. - Automatic splitting applies to the normal MMC/SD block read/write entry points. Direct SDIO and raw-command ioctl callers must honor host constraints; this is not a generic split mechanism for every command. - Kconfig and interface comments explain the new configuration and capability. No Markdown documents are included in this PR. ## Testing Build host: Linux x86_64, WSL2 kernel `6.6.114.1-microsoft-standard-WSL2`. Compiler: GNU Arm Embedded Toolchain `10.2.1 20201103 (10-2020-q4-major)`. Apps revision: `apache/nuttx-apps` `b66303e26aa537dd74d6abaeeeded81c151a7e35`. Built in a clean, separate worktree using the existing local WeAct STM32H743 SD-card configuration, refreshed against current Kconfig: ```text CONFIG_ARCH_CHIP_STM32H743VI=y CONFIG_STM32_SDMMC1=y CONFIG_STM32_SDMMC_IDMA=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_MMCSD_MULTIBLOCK_LIMIT=0 ``` For each variant: `make olddefconfig`, then `make -j8`. ```text Bounce enabled, BOUNCE_BLOCKS=8: LD: nuttx CP: nuttx.hex CP: nuttx.bin Result: success, no compiler warnings arm-none-eabi-size: text=226466 data=1416 bss=14024 arm-none-eabi-nm: 24002c20 00001000 b g_sdmmc1_idmabuffer Buffer is 4096 bytes in AXI SRAM, aligned to 32 bytes. Bounce disabled: LD: nuttx CP: nuttx.hex CP: nuttx.bin Result: success, no compiler warnings Style/whitespace: tools/checkpatch.sh -g upstream/master..HEAD: All checks pass git diff --check upstream/master..HEAD: pass ``` No on-board runtime, throughput, data-integrity or fault-injection testing has been performed for this submission. Build success does not establish hardware correctness. ## Remaining work (Draft) - Verify IDMA/data-path ownership and cleanup on success, CRC errors, command failures, cancellation and software timeouts before reusing the bounce buffer. The current software-timeout wakeup path does not itself disable IDMA. - Validate address/alignment boundaries, oversized requests, cache write-back/cache-disabled operation, and next-request recovery after errors on hardware. - Review the maximum-request contract, including a host limit smaller than one block, raw-command callers, and debug assertions versus runtime errors. - Check other SDIO hosts and STM32H7 instances/families, and measure direct versus bounced multi-block performance. - Human author certification (`Signed-off-by`) remains outstanding. These AI-assisted commits include `Assisted-by`; no human certification was added by the agent. - [x] PR is work in progress and submitted as Draft. - [ ] PR is ready to merge. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
