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commit 5b8df0f65b560027b089513e207cb0f067a7a094
Author: Jukka Laitinen <[email protected]>
AuthorDate: Tue Sep 22 15:49:24 2026 +0300

    arch/arm/imxrt: Fix lpspi clocking for imxrt118x
    
    At imxrt_lpspibus_initialize the code tried to read IMXRT_LPSPI_CR to
    detect whether the SPI is already initialized. This doesn't work on
    imxrt118x, if the LPSPI clock is still gated. But the gate is
    opened only during the initialization. So this is a chicken-egg
    problem.
    
    Instead of reading the register, just have an "initialized" flag in
    priv.
    
    Signed-off-by: Jukka Laitinen <[email protected]>
---
 arch/arm/src/imxrt/imxrt_lpspi.c | 33 ++++++++++++++++++---------------
 1 file changed, 18 insertions(+), 15 deletions(-)

diff --git a/arch/arm/src/imxrt/imxrt_lpspi.c b/arch/arm/src/imxrt/imxrt_lpspi.c
index 7e60ac7b6c5..087582ae040 100644
--- a/arch/arm/src/imxrt/imxrt_lpspi.c
+++ b/arch/arm/src/imxrt/imxrt_lpspi.c
@@ -111,6 +111,7 @@ struct imxrt_lpspidev_s
 {
   struct spi_dev_s spidev;    /* Externally visible part of the SPI interface 
*/
   uint32_t spibase;           /* SPIn base address */
+  bool initialized;           /* True: Bus hardware has been initialized */
 #ifdef CONFIG_IMXRT_LPSPI_INTERRUPTS
   uint8_t spiirq;             /* SPI IRQ number */
 #endif
@@ -1675,8 +1676,10 @@ static void imxrt_lpspi_recvblock(struct spi_dev_s *dev,
  *
  ****************************************************************************/
 
-void imxrt_lpspi_clock_enable(uint32_t base)
+void imxrt_lpspi_clock_enable(struct imxrt_lpspidev_s *priv)
 {
+  uint32_t base = priv->spibase;
+
   if (base == IMXRT_LPSPI1_BASE)
     {
       imxrt_clockall_lpspi1();
@@ -1705,6 +1708,8 @@ void imxrt_lpspi_clock_enable(uint32_t base)
       imxrt_clockall_lpspi6();
     }
 #endif
+
+  priv->initialized = true;
 }
 
 /****************************************************************************
@@ -1715,8 +1720,10 @@ void imxrt_lpspi_clock_enable(uint32_t base)
  *
  ****************************************************************************/
 
-void imxrt_lpspi_clock_disable(uint32_t base)
+void imxrt_lpspi_clock_disable(struct imxrt_lpspidev_s *priv)
 {
+  uint32_t base = priv->spibase;
+
   if (base == IMXRT_LPSPI1_BASE)
     {
       imxrt_clockoff_lpspi1();
@@ -1745,6 +1752,8 @@ void imxrt_lpspi_clock_disable(uint32_t base)
       imxrt_clockoff_lpspi6();
     }
 #endif
+
+  priv->initialized = false;
 }
 
 /****************************************************************************
@@ -1768,7 +1777,7 @@ static void imxrt_lpspi_bus_initialize(struct 
imxrt_lpspidev_s *priv)
 
   /* Enable power and reset the peripheral */
 
-  imxrt_lpspi_clock_enable(priv->spibase);
+  imxrt_lpspi_clock_enable(priv);
 
   /* Reset to known status */
 
@@ -2015,8 +2024,7 @@ struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
 
       /* Only configure if the bus is not already configured */
 
-      if ((imxrt_lpspi_getreg32(priv, IMXRT_LPSPI_CR_OFFSET)
-           & LPSPI_CR_MEN) == 0)
+      if (!priv->initialized)
         {
           /* Configure SPI1 pins: SCK, MISO, and MOSI */
 
@@ -2046,8 +2054,7 @@ struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
 
       /* Only configure if the bus is not already configured */
 
-      if ((imxrt_lpspi_getreg32(priv, IMXRT_LPSPI_CR_OFFSET)
-           & LPSPI_CR_MEN) == 0)
+      if (!priv->initialized)
         {
           /* Configure SPI2 pins: SCK, MISO, and MOSI */
 
@@ -2077,8 +2084,7 @@ struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
 
       /* Only configure if the bus is not already configured */
 
-      if ((imxrt_lpspi_getreg32(priv, IMXRT_LPSPI_CR_OFFSET)
-           & LPSPI_CR_MEN) == 0)
+      if (!priv->initialized)
         {
           /* Configure SPI3 pins: SCK, MISO, and MOSI */
 
@@ -2108,8 +2114,7 @@ struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
 
       /* Only configure if the bus is not already configured */
 
-      if ((imxrt_lpspi_getreg32(priv, IMXRT_LPSPI_CR_OFFSET)
-           & LPSPI_CR_MEN) == 0)
+      if (!priv->initialized)
         {
           /* Configure SPI4 pins: SCK, MISO, and MOSI */
 
@@ -2139,8 +2144,7 @@ struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
 
       /* Only configure if the bus is not already configured */
 
-      if ((imxrt_lpspi_getreg32(priv, IMXRT_LPSPI_CR_OFFSET)
-           & LPSPI_CR_MEN) == 0)
+      if (!priv->initialized)
         {
           /* Configure SPI5 pins: SCK, MISO, and MOSI */
 
@@ -2170,8 +2174,7 @@ struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
 
       /* Only configure if the bus is not already configured */
 
-      if ((imxrt_lpspi_getreg32(priv, IMXRT_LPSPI_CR_OFFSET)
-           & LPSPI_CR_MEN) == 0)
+      if (!priv->initialized)
         {
           /* Configure SPI6 pins: SCK, MISO, and MOSI */
 

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