wpan11nv commented on a change in pull request #5226: [CODEGEN][CUDA] Fix
vector load
URL: https://github.com/apache/incubator-tvm/pull/5226#discussion_r404948586
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File path: src/target/source/codegen_cuda.cc
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@@ -591,13 +591,17 @@ void CodeGenCUDA::VisitExpr_(const RampNode* op,
std::ostream& os) {
}
void CodeGenCUDA::VisitExpr_(const BroadcastNode* op, std::ostream& os) { //
NOLINT(*)
- if (op->dtype.is_int() && op->dtype.bits() == 8 && op->lanes == 4) {
+ if ((op->dtype.is_int() || op->dtype.is_uint()) && op->dtype.bits() == 8 &&
op->lanes == 4) {
// make_int8x4
const int64_t *p = as_const_int(op->value);
CHECK(p);
int64_t v = *p & 0xFF;
v = (v << 24) | (v << 16) | (v << 8) | v;
- os << "(int)" << v;
+ if (op->dtype.is_uint()) {
Review comment:
why do we care the signedness? this just downcasts to 32 bits,.
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