On Sat, Jan 19, 2008 at 01:18:11AM +0100, Carl-Daniel Hailfinger wrote: > + while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP) > myusec_delay(10);
Indent this properly, please. //Peter -- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
